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Details of remote input signals
FPGA controlling flag
■Device number
Name
FPGA controlling flag
■Description
The FPGA controlling flag (RX0) turns on while the FPGA is operating.
This signal turns on under the following conditions.
• When FPGA control start request (RY0) turns on
• When FPGA configuration is completed when "FPGA control automatic start setting" is "enable"
• When "FPGA control continuation setting" is set to "Stop" in CC-Link IE TSN communication mode and FPGA control is
started depending on the status of the CPU module or data link (example: CPU module STOP RUN, during
disconnection during cyclic transmission)
This signal turns off under the following conditions.
• When FPGA control stop request (RY1) turns on
• When a moderate or severe error occurs in the FPGA module
• When "FPGA control continuation setting" is set to "Stop" in CC-Link IE TSN communication mode and the CPU module
status and data link status become such that FPGA control is stopped (example: CPU module RUN STOP, during cyclic
transmission during disconnection)
• When starting FPGA download
• While executing the parameter write using FPGA Module Configuration Tool
Remote READY
OFF
(RXB)
FPGA control start request
OFF
(RY0)
FPGA control stop request
OFF
(RY1)
FPGA controlling flag
OFF
(RX0)
FPGA logic control state
Performed by FPGA module
Executed by the program
(1) Stopping
(2) In control
ON
ON
ON
(1)
(2)
Device number
RX0
ON
(1)
Appendix 1 Remote I/O Signal
A
APPX
469
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