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Method using remote buffer memory
Any FPGA register can be read from and written to. It is used to write and read at specific timings such as the initial setting of
FPGA register areas from the program. Data is updated between the remote buffer memory and the FPGA register areas
when writing to the remote buffer memory or writing a read request.
Access range of FPGA register access
When using the remote buffer memory, the read and write range of the FPGA register areas differs depending on whether
writing or reading is taking place.
: Possible, : Partially possible, : Impossible
FPGA register
Reset control part
Timing generator
Digital input control part
Digital output control part
Digital I/O control part
Analog input control part
Analog output control part
Logging part
User circuit
Reserve
System area
*1 Read value is not guaranteed. Do not use it for control.
■Access range when reading/writing FPGA register areas
The reading data (cyclic area) (usr_rreg_180 to usr_rreg_1FF) is read to the FPGA register read area (RWr10H to RWr8FH).
Also, the FPGA register write area (RWw10 to RWw8F) is written to the writing data (cyclic area) (usr_wreg_180 to
usr_wreg_1FF).
When designing the user circuit, data allocated to the reading data (cyclic area) (usr_rreg_180 to usr_rreg_1FF) and writing
data (cyclic area) (usr_wreg_180 to usr_wreg_1FF) can be accessed periodically from the program.
■When reading
FPGA register areas other than writing data (cyclic area) (1000_B300H to 1000_B3FEH) and reading data (cyclic area)
(1000_BB00H to 1000_BBFEH) can be read.
■When writing
The write range varies depending on the state of FPGA control flag (RX0).
: Can be written, : Cannot be written
FPGA register
Region
Each control area
*1
User circuit area
Reserve
System area
*1 Other than writing data (transient area) and writing data (cyclic area) in the user circuit area, it is the same as each control area.
12 FUNCTIONS
324
12.6 FPGA Register Access Function
Cyclic area
Transient area
Others
Type
Control
Parameter
Monitor
Reserve
System area
Writing data (transient area)
Writing data (cyclic area)
Remote buffer memory
Read
*1
FPGA control flag (RX0)
OFF (while FPGA control is
stopped)
Write
ON (during FPGA control)
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Troubleshooting
