Dell EMC PowerEdge XE7440 Installation And Service Manual page 113

Table 10. Memory operating modes (continued)
Memory Operating Mode
Dell Fault Resilient Mode
Optimizer Mode
This mode supports Single Device Data Correction (SDDC) only for memory modules that use x4 device width. It does not
impose any specific slot population requirements.
● Dual processor: Populate the slots in round robin sequence starting with processor 1.
NOTE: Processor 1 and processor 2 population should match.
Table 11. Memory population rules
Processor Configuration
Single processor Optimizer (Independent
channel) population order
Mirror population order
Single rank sparing population
order
Multi rank sparing population
order
Fault resilient population order
Dual processor (Start Optimized (Independent
with processor1. channel) population order
processor1 and
Mirroring population order
processor 2
population should
match)
Single rank sparing population
order
Multi rank spare population
order
Fault resilient population order
Description
NOTE: To use memory sparing, this feature must be
enabled in the BIOS menu of System Setup.
NOTE: Memory sparing does not offer protection against
a multi-bit uncorrectable error.
The Dell Fault Resilient Mode if enabled, the BIOS creates
an area of memory that is fault resilient. This mode can be
used by an OS that supports the feature to load critical
applications or enables the OS kernel to maximize system
availability.
NOTE: This feature is only supported in Gold and Platinum
Intel processors.
NOTE: Memory configuration has to be of same size
DIMM, speed, and rank.
Memory population
1, 2, 4, 5
{1, 2, 3, 4, 5, 6}
1, 2, 3, 4, 5, 6, 7, 8
1, 2, 3, 4, 5, 6, 7, 8
{1, 2, 3, 4, 5, 6}
A{1}, B{1}, A{2}, B{2}, A{4},
B{4}, A{5}, B{5}
A{1,2,3,4,5,6},
B{1,2,3,4,5,6}
A{1}, B{1}, A{2}, B{2}, A{3},
B{3}...
A{1}, B{1}, A{2}, B{2}, A{3},
B{3}...
A{1,2,3,4,5,6},
B{1,2,3,4,5,6}
Installing and removing system components
Memory population information
Odd amount of DIMMs per
processor allowed.
Mirroring is supported with 6
DIMMs per processor
Populate in this order, odd amount
per processor allowed. Requires
two ranks or more per channel.
Populate in this order, odd amount
per processor allowed. Requires
three ranks or more per channel.
Supported with 6 DIMMs per
processor.
Odd amount of DIMMs per
processor allowed.
Mirroring is supported with 6
DIMMs per processor.
Populate in this order, odd amount
per processor allowed. Requires
two ranks or more per channel.
Populate in this order, odd amount
per processor allowed. Requires
three ranks or more per channel.
Supported with 6 DIMMs per
processor.
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