Vcu118 Fpga U1 Gty Transceiver Bank 120 Connections - Xilinx VCU118 User Manual

Table 3-8 through
125, 126, 127 connections, respectively.
Table 3-8: VCU118 FPGA U1 GTY Transceiver Bank 120 Connections
FPGA
MGT FPGA (U1) Pin
(U1)
Bank Name
Pin
BD42 MGTYTXP0_120
BD43 MGTYTXN0_120
BC45 MGTYRXP0_120
BC46 MGTYRXN0_120
BB42 MGTYTXP1_120
BB43 MGTYTXN1_120
BA45 MGTYRXP1_120
BA46 MGTYRXN1_120
AY42 MGTYTXP2_120
GTY
AY43 MGTYTXN2_120
Bank
AW45 MGTYRXP2_120
120
AW46 MGTYRXN2_120
AV42 MGTYTXP3_120
AV43 MGTYTXN3_120
AU45 MGTYRXP3_120
AU46 MGTYRXN3_120
AN40 MGTREFCLK0P_120
AN41 MGTREFCLK0N_120
AM38 MGTREFCLK1P_120
AM39 MGTREFCLK1N_120
VCU118 Board User Guide
UG1224 (v1.0) December 15, 2016
Table 3-13 list the VCU118 FPGA U1 GTY transceiver bank 120, 122, 123,
Schematic Net Name
FMCP_HSPC_DP20_C2M_P
FMCP_HSPC_DP20_C2M_N
FMCP_HSPC_DP20_M2C_P
FMCP_HSPC_DP20_M2C_N
FMCP_HSPC_DP21_C2M_P
FMCP_HSPC_DP21_C2M_N
FMCP_HSPC_DP21_M2C_P
FMCP_HSPC_DP21_M2C_N
FMCP_HSPC_DP22_C2M_P
FMCP_HSPC_DP22_C2M_N
FMCP_HSPC_DP22_M2C_P
FMCP_HSPC_DP22_M2C_N
FMCP_HSPC_DP23_C2M_P
FMCP_HSPC_DP23_C2M_N
FMCP_HSPC_DP23_M2C_P
FMCP_HSPC_DP23_M2C_N
FMCP_HSPC_GBTCLK5_M2C_P
FMCP_HSPC_GBTCLK5_M2C_N
FMCP_HSPC_GBT1_5_P
FMCP_HSPC_GBT1_5_N
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Chapter 3: Board Component Descriptions
Connected Connected Pin
Pin Name
Z8 DP20_C2M_P
Z9 DP20_C2M_N
M14 DP20_M2C_P
M15 DP20_M2C_N
Y6 DP21_C2M_P
Y7 DP21_C2M_N
M10 DP21_M2C_P
M11 DP21_M2C_N
Z4 DP22_C2M_P
Z5 DP22_C2M_N
M6 DP22_M2C_P
M7 DP22_M2C_N
Y2 DP23_C2M_P
Y3 DP23_C2M_N
M2 DP23_M2C_P
M3 DP23_M2C_N
Z20 GBTCLK5_M2C_P
Z21 GBTCLK5_M2C_N
19 Q5_P
20 Q5_N
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Connected
Device
FMC+ HSPC J22
U39 ICS855S006I
clock buffer
54