Digilent Usb Jtag Module; Jtag Chain Block Diagram - Xilinx VCU118 User Manual

Digilent USB JTAG Module

[Figure 2-1, callout 8, 9]
JTAG configuration is provided through a Digilent onboard USB-to-JTAG configuration
logic module (U115) where a host computer accesses the VCU118 board JTAG chain
through a type-A (host side) to micro-B (VCU118 board side J106) USB cable.
A 2 mm JTAG header (J3) is also provided in parallel for access by Xilinx download cables,
such as the Platform Cable USB II. JTAG initiated configuration takes priority over the
configuration method selected through the FPGA mode pins M[2:0], wired to SW16
positions [2:4]. The JTAG chain of the VCU118 board is illustrated in
For more details about the Digilent USB JTAG Module, see the Digilent website
X-Ref Target - Figure 3-3
System TDO
Ctlr.
(U111)
TCK
TMS
TDI
Digilent
USB
TCK
Module
TMS
(U115)
TDI
TDO
JTAG TDO
Con
TDI
(J3)
TMS
TCK
Level-shifted to 1.8V
VCU118 Board User Guide
UG1224 (v1.0) December 15, 2016
1.8V 3.3V
U19
J2
Connector
1.8V 3.3V
TDO
U13
Figure 3-3: JTAG Chain Block Diagram
www.xilinx.com
Chapter 3: Board Component Descriptions
Level-shifted to 3.3V
To FMC HSPC J22
and FMC HPC1 J2
U1
FPGA
TCK
TMS
TDI
SPST Bus Switch
U132
N.C.
FMC
HPC1
TDI
Figure 3-3.
[Ref
Level-shifted to 3.3V
1.8V 3.3V
TDO
U19
SPST Bus Switch
U26
N.C.
J22
FMC+
HSPC
Connector
TDO TDI
X18023-100416
Send Feedback
21].
40