User Pmod Gpio Headers; Pmod Connectors J52 And J53 With Level Shifters U41 And U42 - Xilinx VCU118 User Manual

User Pmod GPIO Headers

[Figure 2-1, callout 29]
The VCU118 evaluation board supports two Pmod GPIO headers J52 and J53. The Pmod
nets connected to these headers are accessed using level shifters U41 (PMOD0 J52) and
U42 (PMOD1 J53). The level shifters are wired to XCVU9P FPGA U1 banks 47 and 67.
Figure 3-23 shows the GPIO Pmod headers J52 (female right-angle) and J53 (male vertical).
X-Ref Target - Figure 3-23
Figure 3-23: Pmod Connectors J52 and J53 with Level Shifters U41 and U42
VCU118 Board User Guide
UG1224 (v1.0) December 15, 2016
Chapter 3: Board Component Descriptions
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