Vcu118 Board Fpga U1 To Firefly J6 Connections - Xilinx VCU118 User Manual

The connections between the J6 and the FPGA are listed in
Table 3-24: VCU118 Board FPGA U1 to FireFly J6 Connections
FPGA
FPGA (U1) Pin Name
(U1) Pin
G5 MGTYTXP0_233
G4 MGTYTXN0_233
K2 MGTYRXP0_233
K1 MGTYRXN0_233
F7 MGTYTXP1_233
F6 MGTYTXN1_233
H2 MGTYRXP1_233
H1 MGTYRXN1_233
E5 MGTYTXP2_233
E4 MGTYTXN2_233
F2 MGTYRXP2_233
F1 MGTYRXN2_233
C5 MGTYTXP3_233
C4 MGTYTXN3_233
D2 MGTYRXP3_233
D1 MGTYRXN3_233
U28.20
U28.19
AN23 IO_L20N_T3L_N3_AD1N_64
AY22 IO_L10P_T1U_N6_QBC_AD4P_64
AN24 IO_L20P_T3L_N2_AD1P_64
AT21 IO_T2U_N12_64
NA
NA
NA
NA
Notes:
1. Wired to bank 64 via level-shifter U33, I/O standard LVCMOS18.
2. Wired to bank 64 via level-shifter U21, I/O standard LVCMOS18.
For additional information about the FireFly connector, see the Samtec website
VCU118 Board User Guide
UG1224 (v1.0) December 15, 2016
Schematic Net Name
FIREFLY_TX1_P
FIREFLY_TX1_N
FIREFLY_RX1_P
FIREFLY_RX1_N
FIREFLY_TX2_P
FIREFLY_TX2_N
FIREFLY_RX2_P
FIREFLY_RX2_N
FIREFLY_TX3_P
FIREFLY_TX3_N
FIREFLY_RX3_P
FIREFLY_RX3_N
FIREFLY_TX4_P
FIREFLY_TX4_N
FIREFLY_RX4_P
FIREFLY_RX4_N
SCL FIREFLY_SCL(1)
SDA FIREFLY_SDA(1)
FIREFLY_MODSEL_B
FIREFLY_RESET_B
FIREFLY_MODPRS_B
FIREFLY_INT_B
NA UTIL_3V3_L4
NA
NA
NA UTIL_3V3_L5
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Chapter 3: Board Component Descriptions
Table
FPGA (U1)
Direction
Output
Output
Input
Input
Output
Output
Input
Input
Output
Output
Input
Input
Output
Output
Input
Input
Output
BiDir
(1)
Output
(1)
Output
(2)
Output
(2)
Input
NA (power)
GND NA (power)
VCC1V8 NA (power)
NA (power)
3-24.
FireFly J6
Pin Num Pin Name
A3 TX1P
A2 TX1N
B17 RX1P
B18 RX1N
B3 TX2P
B2 TX2N
A17 RX2P
A18 RX2N
A6 TX3P
A5 TX3N
B14 RX3P
B15 RX3N
B6 TX4P
B5 TX4N
A14 RX4P
A15 RX4N
8 SCL
7 SDA
4 MODSEL
6 RESETL
3 MODPRS
5 INTL
1 VCC_TX
2 GND_14
9 RSVD_14
10 VCC_RX
[Ref 26].
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