Board Features; Clock Sources - Xilinx VCU118 User Manual

Board Features

The VCU118 evaluation board features are listed here. Detailed information for each feature
is provided in Component Descriptions in Chapter
• Virtex UltraScale+ XCVU9P-L2FLGA2104 device
®
• Zynq -7000 AP SoC XC7Z010 based system controller
• Two 2.5 GB DDR4 80-bit component memory interfaces (five [256 Mb x 16] devices
each)
• 288 MB 72-bit RLD3 memory interface comprised of two 1.125 Gb 36-bit devices
• 1 Gb (128 MB) linear x16 BPI flash memory
• USB JTAG interface using a Digilent module with separate micro-B USB connector
•

Clock sources:

Si5335A quad clock generator
°
Three Si570 I
°
One SG5032 fixed 250 MHz LVDS clock generator
°
Si5328B clock multiplier and jitter attenuator for QSFP
°
Subminiature version A (SMA) connectors (differential)
°
• 52 GTY transceivers (13 Quads)
FMC+ HSPC connector (twenty-four GTY transceivers)
°
2x28 Gb/s QSFP+ connectors (eight GTY transceivers)
°
Samtec Firefly connector (four GTY transceiver)
°
PCIe 16-lane edge connector (sixteen GTY transceivers)
°
• PCI Express endpoint connectivity
Gen1 16-lane (x16)
°
Gen2 16-lane (x16)
°
Gen3 8-lane (x8)
°
• Ethernet PHY SGMII interface with RJ-45 connector
• Dual USB-to-UART bridge with micro-B USB connector
2
• I C bus
• Status LEDs
• User I/O (4-pole DIP switch, 6 each push-button switches, 8 x LED)
VCU118 Board User Guide
UG1224 (v1.0) December 15, 2016
2
C programmable LVDS clock generators
www.xilinx.com
Chapter 1: Introduction
3.
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