Gtx Transceiver Clock Connections - Xilinx Virtex-7 FPGA VC7203 Getting Started Manual

Chapter 1: VC7203 IBERT Getting Started Guide
it is not already inserted (see
Note:
X-Ref Target - Figure 1-4
Attach the Samtec BullsEye connector to GTX Quad 115
indexing pins on the bottom of the connector with the guide holes on the board. Hold the
connector flush with the board and fasten it by tightening the two captive screws.
X-Ref Target - Figure 1-5

GTX Transceiver Clock Connections

See
reference clock inputs. Connect these cables to the SuperClock-2 module as follows:
•
10
Figure 1-4 is for reference only and might not reflect the current version of the connector.
Figure 1-4: BullsEye Connector with Elastomer Seal
Figure 1-5: BullsEye Connector Attached to Quad 115
Figure 1-2, page 9 to identify the P and N coax cables that are connected to the CLK1
CLK1_P coax cable → SMA connector J5 (CLKOUT1_P) on the SuperClock-2 module
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Figure 1-4).
UG847_c1_04_1013112
VC7203 IBERT Getting Started Guide
(Figure 1-5), aligning the two
UG847_c1_05_10312
UG847 (v3.0) July 10, 2013