Adsp-219X Dsp Boot Modes - Analog Devices VisualDSP++ 3.5 Manual

ADSP-219x DSP Boot Modes

At powerup, after the reset, the processor transitions into a boot mode
sequence configured by the
mode-control pins; the pin states are captured and placed in the Reset
Configuration register as
register is also known as the System Configuration Register (
I/O address
0x0 0204
Table 3-1. ADSP-219x DSP Operation Modes
BMODE1 BMODE0
Pin Pin
0 0
0 1
1 0
1 1
0 0
0 1
1 0
The pin has a dual role; it acts as a boot-mode select during
OPMODE
and determines whether the DSP's third SPORT functions as a SPORT or
an SPI. It is possible for an application to require
ently at runtime than at
during runtime). In this case, the boot kernel is responsible for setting
accordingly at the end of the booting process. Therefore, software
OPMODE
can change
OPMODE
peripherals are disabled at that time.
VisualDSP++ Loader Manual
for 16-Bit Processors
ADSP-219x DSP Loader/Splitter
BMODE2–0
,
BMODE0 BMODE1
.
OPMODE Description
Pin
No-boot mode. Run from external 16-bit memory at
0
logical address
Boot from EPROM.
0
Boot from Host.
0
Reserved.
0
No-boot mode. Run from external 8-bit memory at
1
logical address
Boot from UART.
1
Boot from SPI (up to 4K bits).
1
(that is, boot from an SPI but use SPORT2
RESET
anytime during runtime, as long as the corresponding
pins. The pins are dedicated
BMODE
, and (see
OPMODE
. Bypass ROM.
0x10000
. Bypass ROM.
0x10000
OPMODE
Table 3-1). The
) with
SYSCR
RESET
to operate differ-
3-3