Adsp-Bf531/Bf532/Bf533 Processor On-Chip Boot Rom - Analog Devices VisualDSP++ 3.5 Manual

ADSP-BF531/BF532/BF533 Processor On-Chip Boot ROM

The on-chip boot ROM for ADSP-BF531/BF532/BF533 processors does
the following.
1. Sets up supervisor mode by exiting the
tine and jumping into the lowest priority interrupt (
2. Checks whether the
skip the entire boot sequence and jump to the start of L1 memory
(
0xFFA0 0000
ADSP-BF531 and ADSP-BF532 processors) for execution. The
on-chip boot ROM does this by checking bit 4 of the System Reset
Configuration Register
boot ROM performs the full boot sequence. If bit 4 is set, the
on-chip boot ROM bypasses the full boot sequence and jumps to
the start of L1 memory.
System Reset Configuration Register (SYSCR)
X - state is initialized from mode pins during hardware reset
15 14
0xFFC0 0104
0 0
No Boot on Software Reset
0 - Use BMODE to determine
boot source
1 - Start executing from the
beginning of on-chip L1
memory or the beginning of
ASYNC Bank 0 when
BMODE[1:0] = b#00
Figure 2-8. ADSP-BF533 Processors: System Reset Configuration Register
3. Eventually, if bit 4 of the
ROM performs the full boot sequence
VisualDSP++ Loader Manual
for 16-Bit Processors
Blackfin Processor Loader/Splitter
RESET
for ADSP-BF533 processor;
(Figure
13 12 11 10 9 8 7 6
0 0 0 0 0 0 0 0
SYSCR
RESET
was a software reset and if so, whether to
0xFFA0 8000
2-8). If bit 4 is not set, the on-chip
5 4 3 2 1 0
0 0 0 X X 0
BMODE[1:0] (Boot Mode)- RO
00 - Bypass boot ROM,
01 - Use boot ROM to load
10 - Use boot ROM to configure
11 - Use boot ROM to configure
register is not set, the on-chip boot
(Figure
interrupt service rou-
).
IVG15
for
Reset = dependent on pin
values
execute from 16-bit
external memory
from 8-bit flash
and load boot code from
SPI serial ROM
(8-bit address range)
and load boot code from
SPI serial ROM
(16-bit address range)
2-9).
2-17