Analog Devices VisualDSP++ 3.5 Manual page 164

Loader manual for 16-bit processors
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INDEX
file formats
A-10
reset 2-2, 2-3, 2-16, 5-2, 5-6,
ADSP-2192 DSPs
RESET interrupt 2-17,
ROM
images
5-15
memory
5-18
ROM splitter
setting options
2-52
-romsplitter loader switch 2-45,
RTBL
see run-time boot loader
run-time boot loader
creating
4-7
handling overlays
overlays over PCI
reference
4-7
running
4-6
S
-s loader switch
5-10
-s splitter switch
5-19
scratch memory
2-35
SDRAM memory 2-6, 2-13, 2-25,
configuring
2-14
init code example
initializing 2-14, 2-21,
second-stage loader 2-6, 2-35, 2-36,
2-49,
2-51
default settings
2-49
restrictions
2-14
selecting
2-48
setting options
2-49
shared memory
2-36
I-10
5-11
4-3
2-28
3-23
4-6
4-2
4-9
4-8
2-35
2-23
2-25
silicon revision setting 2-46,
simulating booting process
simulator 1-2,
1-3
-si-revision loader switch
-si-revision loader switch
slave processors 1-4,
software resets
1-5
source files
1-2
assembly instructions
C/C++
A-2
fixed-point data
A-3
specifying format
byte-stream
5-10
Intel hex
5-10
Motorola
5-10
specifying kernel & app files
specifying Motorola formats
SPI booting 2-3, 2-9, 2-12, 2-14, 2-16,
2-26
baudrate
2-42
SPI memory 2-26,
8-, 16-, 24-bit addressable
-split # loader switch
splitter
ADSP-218x DSPs 5-1,
ADSP-219x DSPs
ASCII-format files (.LDR)
splitting
1-4
SPORT data files
A-9
SRAM memory 2-25, 2-28,
2-13
start addresses 2-16,
status information 2-46,
streams
VisualDSP++ Loader Manual
for 16-Bit Processors
4-14
5-7
4-14
2-46
5-11
A-3
2-50
5-19
2-28
2-27
3-23
5-15
3-13
A-9
2-34
5-10
2-48

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