Analog Devices VisualDSP++ 3.5 Manual page 35

System Reset Configuration Register (SYSCR)
X - state is initialized from mode pins during hardware reset
15 14 13 12 11 10
0 0 0 0
No Boot on Software Reset
0 - Use BMODE to determine
boot source.
1 - Start executing from the
beginning of on-chip L2 memory
(or the beginning of ASYNC Bank 0
when BMODE[2:0] = b#000).
Figure 2-3. ADSP-BF535 Processors: System Reset Configuration Register
3. Finally, if bit 4 of the
ROM performs the full boot sequence. The full boot sequence
includes:
Checking the boot source (either Flash/PROM or SPI mem-
"
ory) by reading
Reading the first four bytes from location
"
nal memory device. These four bytes contain the byte count
(
Booting in
"
tion
Jumping to the start of L2 memory for execution.
"
The on-chip boot ROM boots in
bytes can define the size of the actual application code or a second-stage
N
loader (boot kernel) that boots in the application code.
VisualDSP++ Loader Manual
for 16-Bit Processors
Blackfin Processor Loader/Splitter
9 8 7 6 5
0 0 0 0 0 0 0
SYSCR
BMODE[2:0]
), which specifies the number of bytes to boot in.
N
bytes into internal L2 memory starting at loca-
N
.
0xF000 0000
4 3 2 1 0
0 X X X 0
Reset = dependent on pin values
BMODE 2-0 - RO
000 - Bypass boot ROM,
001 - Use boot ROM to load
010 - Use boot ROM to configure
011 - Use boot ROM to configure
100-111 - Reserved
register is not set, the on-chip boot
from the
bytes from the external memory. These
N
execute from 16-bit-wide
external memory.
from 8-bit/16-bit FLASH.
and load boot code from
SPI0 serial ROM
(8-bit address range).
and load boot code from
SPI0 serial ROM
(16-bit address range).
register.
SYSCR
of the exter-
0x0
2-5