Analog Devices VisualDSP++ 3.5 Manual page 45

!
The two reasons for this restriction are:
• Core writes into L1 instruction memory are not allowed.
• DMA from an 8-bit external memory is not possible since
the minimum width of the External Bus Interface Unit
(EBIU) is 16 bits.
Load bytes into L1 instruction memory by using the instruction test com-
mand and data registers, as described in the Memory chapter of the
appropriate Hardware Reference manual. These registers transfer 8-byte
sections of data from external memory to internal L1 instruction memory.
VisualDSP++ Loader Manual
for 16-Bit Processors
Blackfin Processor Loader/Splitter
2-15