Initialization Blocks - Analog Devices VisualDSP++ 3.5 Manual

Table 2-4. Flag Structure
Bit Field Description
Zero-Fill Block Indicates that the block is a buffer filled with zeros. Zero Block is not included
within loader file. When the loader parses through the .
a large buffer with zeros, it creates a zero-fill block to reduce .
boot time. If this bit is set, there is no data in the block.
Ignore Block Indicates that the block is not to be booted into memory; skips the block and
move on to the next one. Currently is not implemented for application code.
Initialization Indicates that the block is to be executed before booting. The initialization
Block block indicator allows the on-chip boot ROM to execute a number of instruc-
tions before booting the actual application code. When the on-chip boot ROM
detects an Init Block, it boots the block into internal memory and makes a
CALL
This option allows the user to run initialization code (such as SDRAM initial-
ization) before the full boot sequence proceeds.
illustrate the process. Initialization code can be included within the .
using the
Processor Type Indicates the processor, either ADSP-BF531/BF532 or ADSP-BF533. After
booting is complete, the cn-chip boot ROM jumps to
ADSP-BF533 processor and to
cessor.
Last Block Indicates that the block is the last block to be booted into memory. After the
last block, the processor jumps to the start of L1 memory for application code
execution. When it jumps to L1 memory for code execution, the processor is
still in Supervisor Mode and in the lowest priority interrupt (IVG15).

Initialization Blocks

The
-init filename
block from the code of the initialization section of the named file. The ini-
tialization block is placed at the top of a loader file. It is executed before
the rest of the code in the loader file is booted into the memory (see
Figure 2-11).
Following execution of the initialization block, the booting process con-
tinues with the rest of data blocks until it encounters a final block (see
Figure 2-12). The initialization code example follows in
VisualDSP++ Loader Manual
for 16-Bit Processors
Blackfin Processor Loader/Splitter
to it (Initialization code must have a RTS at the end).
switch (see "-init filename" on page
-init
option directs the loader to produce an initialization
DXE
Figure 2-11
2-43).
0xFFA0 0000
for a ADSP-BF531/BF532 pro-
0xFFA0 8000
file and encounters
file size and
LDR
and Figure 2-12
file by
LDR
for a
Listing 2-1
2-21