Adsp-Bf561 Processor Boot Streams - Analog Devices VisualDSP++ 3.5 Manual

ISR. The boot ROM then checks to see if it has been invoked by a soft-
ware reset by examining bit 4 of the System Reset Configuration Register
( ).
SYSCR
If bit 4 is not set, the boot ROM presumes that a hard reset has occurred
and performs the full boot sequence. If bit 4 is set, the boot ROM under-
stands that the user code has invoked a software reset and restarts the user
program by jumping to the beginning of core A's L1 memory
( ), bypassing the entire boot sequence.
0xFFA0 0000
When developing an ADSP-BF561 processor application, you start with
compiling and linking your application code into an executable file
( ). The debugger loads the
.DXE
cutes it. With two cores, two
real-time environment, there is no debugger, which allows the boot ROM
to load the executables into memory.

ADSP-BF561 Processor Boot Streams

The loader converts the
executable and creating blocks. Each block is encapsulated within a
10-byte header. The
(Flash, PROM, or EEPROM). The boot ROM reads the external memory
device, parsing the headers and copying the blocks to the addresses where
they reside during program execution. After all the blocks are loaded, the
boot ROM jumps to address
!
When running code on both cores, the core A program is responsi-
ble for releasing core B from the idle state by clearing bit 5 in
core A's System Configuration Register. Then core B begins execu-
tion at address
Multiple
.DXE
VisualDSP++ Loader Manual
for 16-Bit Processors
.DXE
.DXE
into a boot stream file (
.DXE
file is burned into the external memory device
.LDR
0xFFA0 0000
0xFF60 0000
files are often combined into a single boot stream.
Blackfin Processor Loader/Splitter
into the processor's memory and exe-
files can be loaded at once. In the
to execute the core A program.
.
) by parsing the
.LDR
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