Blackfin Processor Booting
Unlike the ADSP-BF531/BF532/BF533 processor, the ADSP-BF561
boot stream begins with a 4-byte global header, which contains informa-
tion about the external memory device. The global header also contains a
signature in the upper 4 bits that prevents the boot ROM from trying to
read a boot stream from a blank device.
Table 2-6. ADSP-BF561 Global Header Structure
Bit Field
0
1–4
5
6–7
8–10
11–27
28–31
Following the global header is a
byte count for the first
tains only a byte count, it is encapsulated by a 10-byte block header, just
like the other blocks.
The 10-byte header tells the boot ROM where in memory to place each
block, how many bytes to copy, and whether the block needs any special
processing. The header structure is the same as that of the
ADSP-BF531/BF532/BF533 processors (described in
Headers" on page
the data block, a 4-byte count for the data block, and a 2-byte flag word,
indicating whether the data block is a "zero-fill" block or a "final block"
(the last block in the boot stream).
2-30
Description
= 16-bit Flash,
= 8-bit Flash; default is
1
0
Number of wait states; default is
Unused bit
Number of hold time cycles for Flash; default is 3
Baud rate for SPI boot:
00
Reserved for future use
Signature that indicates valid boot stream
.DXE
in the boot stream. Though this block con-
.DXE
2-19). Each header contains a 4-byte start address for
0
15
= 500k,
= 1M,
= 2M.
01
10
count block, which contains a 32-bit
VisualDSP++ Loader Manual
for 16-Bit Processors
"Blocks and Block
Need help?
Do you have a question about the VisualDSP++ 3.5 and is the answer not in the manual?