Slave Address Transmission; Data Transfer - Freescale Semiconductor ColdFire MCF52210 ColdFire MCF52211 ColdFire MCF52212 ColdFire MCF52213 Reference Manual

msb
SCL
1
SDA
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
A
START
Signal
25.3.2

Slave Address Transmission

The master sends the slave address in the first byte after the START signal (B). After the seven-bit calling
address, it sends the R/W bit (C), which tells the slave data transfer direction (0 equals write transfer, 1
equals read transfer).
Each slave must have a unique address. An I
be master and slave at the same time.
The slave whose address matches that sent by the master pulls SDA low at the ninth serial clock (D) to
return an acknowledge bit.
25.3.3

Data Transfer

When successful slave addressing is achieved, data transfer can proceed (see E in
byte-by-byte basis in the direction specified by the R/W bit sent by the calling master.
Data can be changed only while SCL is low and must be held stable while SCL is high, as
shows. SCL is pulsed once for each data bit, with the msb being sent first. The receiving device must
acknowledge each byte by pulling SDA low at the ninth clock; therefore, a data byte transfer takes nine
clock pulses. See Figure
SCL
1 2
SDA
Bit7 Bit6
START
Signal
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
(Byte complete)
2 3 4 5 6 7
Calling Address
B
2
Figure 25-7. I C Standard Communication Protocol
2
25-8.
3 4 5 6 7
Bit5 Bit4 Bit3 Bit2 Bit1
Slave Address
Figure 25-8. Data Transfer
SCL held low while
Interrupt bit set
Interrupt is serviced
lsb msb
8 9 1 2
XXX D7 D6
ACK
R/W
E
Bit
C D
C master must not transmit its own slave address; it cannot
SCL held low while
Interrupt is serviced
8 9 1 2
Interrupt Bit Set
(Byte Complete)
Bit0
Bit7 Bit6 Bit5
R/W
ACK from
Receiver
lsb
3 4 5 6 7 8
D5 D4 D3 D2 D1 D0
Data Byte
Figure 25-7) on a
3 4 5 6 7 8
Bit4 Bit3 Bit2 Bit1 Bit0
Data Byte
2
I C Interface
9
No
STOP
ACK Signal
Bit
F
Figure 25-7
9
No
STOP
ACK Bit
Signal
25-9