Bcc (Branch Relative If Condition Satisfied) - Fujitsu FR Family Instruction Manual

32-bit microcontroller
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CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.94

Bcc (Branch Relative if Condition Satisfied)

This branching instruction has no delay slot.
If the conditions established for each particular instruction are satisfied, branch to the
address indicated by "label9" relative to the value of the program counter (PC). When
calculating the address, double the value of "rel8" as a signed extension.
If conditions are not satisfied, no branching can occur.
Conditions for each instruction are listed in Table 7.94-1.
■ Bcc (Branch Relative if Condition Satisfied)
Assembler format:
BRA label9
BNO label9
BEQ label9
BNE label9
BC
BNC label9
BN
BP
Operation:
if (conditions satisfied) {
PC + 2 + exts (rel8 × 2) → PC
}
Table 7.94-1 Branching Conditions
Flag change:
N, Z, V, and C: Unchanged
194
BV
label9
BNV label9
BLT label9
BGE label9
label9
BLE label9
BGT label9
label9
BLS label9
label9
BHI
label9
Mnemonic
cc
BRA
0000
BNO
0001
BEQ
0010
BNE
0011
BC
0100
BNC
0101
BN
0110
BP
0111
N
Z
V
C
Conditions
Mnemonic
Always satisfied
Always unsatisfied
Z = 1
Z = 0
C = 1
C = 0
N = 1
N = 0
cc
BV
1000
BNV
1001
BLT
1010
BGE
1011
BLE
1100
(V xor N) or Z = 1
BGT
1101
(V xor N) or Z = 0
BLS
1110
BHI
1111
Conditions
V = 1
V = 0
V xor N = 1
V xor N = 0
C or Z = 1
C or Z = 0

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