CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.76
STH (Store Half-word Data in Register to Memory)
Stores the half-word data in "Ri" to memory address "Rj".
■ STH (Store Half-word Data in Register to Memory)
Assembler format:
STH Ri, @Rj
Ri → (Rj)
Operation:
Flag change:
N, Z, V, and C: Unchanged
Execution cycles:
a cycle(s)
Instruction format:
Example:
STH R3, @R2
172
N
Z
V
C
–
–
–
–
MSB
0
0
0
1
Instruction bit pattern : 0001 0101 0010 0011
R2
1 2 3 4 5 6 7 8
R3
0 0 0 0 4 3 2 1
Memory
x x x x
12345678
Before execution
0
1
0
1
Rj
LSB
Ri
R2
1 2 3 4 5 6 7 8
R3
0 0 0 0 4 3 2 1
Memory
12345678
4 3 2 1
After execution