CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.5
ADDN (Add Word Data of Source Register to Destination
Register)
Adds the word data in "Rj" and the word data in "Ri", stores results to "Ri" without
changing flag settings.
■ ADDN (Add Word Data of Source Register to Destination Register)
Assembler format:
ADDN Rj, Ri
Ri + Rj → Ri
Operation:
Flag change:
N, Z, V, and C: Unchanged
Execution cycles:
1 cycle
Instruction format:
Example:
ADDN R2, R3
76
N
Z
V
C
–
–
–
–
MSB
1
0
1
0
Instruction bit pattern : 1010 0010 0010 0011
R2
1 2 3 4 5 6 7 8
R3
8 7 6 5 4 3 2 1
N Z V C
CCR
0 0 0 0
Before execution
0
0
1
0
Rj
LSB
Ri
R2
1 2 3 4 5 6 7 8
R3
9 9 9 9 9 9 9 9
N Z V C
CCR
0 0 0 0
After execution