Chapter 7 Detailed Execution Instructions - Fujitsu FR Family Instruction Manual

DETAILED EXECUTION
This chapter presents each of the execution instructions
used by the FR family assembler, in reference format.
The execution instructions used by the FR family CPU
are classified as follows.
• Add/Subtract Instructions
• Compare Instructions
• Logical Calculation Instructions
• Bit Operation Instructions
• Multiply/Divide Instructions
• Shift Instructions
• Immediate Data Transfer Instructions
• Memory Load Instructions
• Memory Store Instructions
• Inter-register Transfer Instructions/Dedicated Register
Transfer Instructions
• Non-delayed Branching Instructions
• Delayed Branching Instructions
• Direct Addressing Instructions
• Resource Instructions
• Coprocessor Instructions
• Other Instructions
7.1
7.2
7.3
CHAPTER 7
INSTRUCTIONS
ADD (Add Word Data of Source Register to Destination Register)
ADD (Add 4-bit Immediate Data to Destination Register)
ADD2 (Add 4-bit Immediate Data to Destination Register)
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