CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.70
ST (Store Word Data in Register to Memory)
Loads the word data in "Ri" to memory address "(R13 + Rj)".
■ ST (Store Word Data in Register to Memory)
Assembler format:
ST Ri, @ (R13, Rj)
Ri → (R13 + Rj)
Operation:
Flag change:
N, Z, V, and C: Unchanged
Execution cycles:
a cycle(s)
Instruction format:
Example:
ST R3, @ (R13, R2)
166
N
Z
V
C
–
–
–
–
MSB
0
0
0
Instruction bit pattern : 0001 0000 0010 0011
R2
0 0 0 0 0 0 0 4
R3
8 7 6 5 4 3 2 1
R13
1 2 3 4 5 6 7 8
Memory
12345678
x x x x x x x x
1234567C
Before execution
1
0
0
0
0
LSB
Rj
Ri
R2
0 0 0 0 0 0 0 4
R3
8 7 6 5 4 3 2 1
R13
1 2 3 4 5 6 7 8
Memory
12345678
1234567C
8 7 6 5 4 3 2 1
After execution