Fujitsu FR Family Instruction Manual page 292

APPENDIX A Instruction Lists
Table A.2-8 Memory Load Instructions (13 Instructions)
Mnemonic
LD @Rj, Ri
LD @(R13,Rj), Ri
LD @(R14,disp10), Ri
LD @(R15,udisp6), Ri
LD @R15+, Ri
LD @R15+, Rs
LD @R15+, PS
LDUH @Rj, Ri
LDUH @(R13,Rj), Ri
LDUH @(R14,disp9), Ri
LDUB @Rj, Ri
LDUB @(R13,Rj), Ri
LDUB @(R14,disp8), Ri
Note:
The field "o8" in the TYPE-B instruction format and the field "u4" in the TYPE-C format have the
following relation to the values "disp8" to "disp10" in assembly notation.
→
• disp8
→
• disp9
→
• disp10
→
• udisp6
268
Format OP
A 04
A 00
B 20
C 03
E 07-0
E 07-8
E 07-9
A 05
A 01
B 40
A 06
A 02
B 60
o8=disp8
o8=disp9 >> 1
o8=disp10 >> 2
u4=udisp6 >> 2
FLAG
CYC
NZVC
(Rj) → Ri
b – – – –
(R13+Rj) → Ri
b – – – –
(R14+disp10) → Ri
b – – – –
(R15+udisp6) → Ri
b – – – –
(R15) → Ri,R15+=4
b – – – –
(R15) → Rs, R15+=4
b – – – –
(R15) → PS, R15+=4
1+a+b CCCC
(Rj) → Ri
b – – – –
(R13+Rj) → Ri
b – – – –
(R14+disp9) → Rj
b – – – –
(Rj) → Ri
b – – – –
(R13+Rj) → Ri
b – – – –
(R14+disp8) → Ri
b – – – –
Operation
Rs: dedicated register
Zero extension
Zero extension
Zero extension
Zero extension
Zero extension
Zero extension
Remarks