Motorola DSP56012 User Manual page 55

Table 2-7 Serial Host Interface (SHI) Signals (Continued)
Signal Signal
Name Type
SS/HA2 Input
HREQ Input or
Output
MOTOROLA
State
during
Reset
Tri-stated SPI Slave Select/I
active low Schmitt-trigger input when configured for the SPI
mode. When configured for the SPI Slave mode, this signal is
used to enable the SPI slave for transfer. When configured for
the SPI Master mode, this signal should be kept deasserted. If
it is asserted while configured as SPI master, a bus error
condition will be flagged.
This signal uses a Schmitt-trigger input when configured for
2
the I C mode. When configured for the I
HA2 signal is used to form the slave device address. HA2 is
ignored in the I
ignores SCK clocks and keeps the MISO output signal in the
high-impedance state.
This signal is tri-stated during hardware, software, or
personal reset (no need for external pull-up in this state).
Tri-stated Host Request—This signal is an active low Schmitt-trigger
input when configured for the Master mode, but an active
low output when configured for the Slave mode.
When configured for the Slave mode, HREQ is asserted to
indicate that the SHI is ready for the next data word transfer
and deasserted at the first clock pulse of the new data word
transfer. When configured for the Master mode, HREQ is an
input, and when asserted by the external slave device, it will
trigger the start of the data word transfer by the master. After
finishing the data word transfer, the master will await the
next assertion of HREQ to proceed to the next transfer.
This signal is tri-stated during hardware, software, personal
reset, or when the HREQ1–HREQ0 bits in the HCSR are
cleared (no need for external pull-up in this state).
DSP56012 User's Manual
Serial Host Interface (SHI)
Signal Description
2
C Slave Address 2—This signal is an
2
C Master mode. If SS is deasserted, the SHI
Signal Descriptions
2
C Slave mode, the
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