Motorola DSP56012 User Manual page 231

24-bit digital signal processor
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bcr
equ
pbc
equ
hsr
equ
horx
equ
hf0
equ
hrdf
equ
hrne
equ
hrx
equ
hcsr
equ
hi2c
equ
ma
equ
mb
equ
mc
equ
org
start
move
move
jclr
downld
clr a
; HEN = 1, HI2C = 0, HM1-HM0 = 10, HFIFO = 1, HMST = 0,
; HRQE1-HRQE0 = 01, HIDLE = 0, HBIE = 0, HTIE = 0, HRIE1-HRIE0 = 00
jset
; "hostld" is the routine that loads from the parallel Host Interface.
; If MC:MB:MA = 001, the internal Program RAM is loaded with up to 256 words
; from an external device connected to the Host Interface.
hostld
bset
do
_LBLA
jclr
enddo
jmp
_LBLB
jclr
movep
_loop1
jmp
MOTOROLA
$fffe
; BCR Register
$ffec
; Port B Control Register
$ffe9
; HOST Status Register
$ffeb
; HOST Receive Register
3
; HOST HF0 flag
0
; HOST RX Full flag
17
; SHI FIFO Not Empty flag
$fff3
; SHI HRX FIFO
$fff1
; SHI Control/Status Register
1
; SHI IIC Enable Control Bit
0
; OMR Mode A
1
; OMR Mode B
4
; OMR Mode C
p:$0
; bootstrap code starts at $0
#$000A00,a0
; Program ROM starting address($0A00)
#<0,r0
; r0 points to internal Program RAM
#ma,omr,exit
; if MC:MB:MA = xx0 goto Program ROM
#$A9,r1
; prepare SHI control value in r1
#mc,omr,shild
; If MC:MB:MA = 1X1 load from SHI
#0,x:pbc
#256,_loop1
#hf0,x:hsr,_LBLB ; if HF0 = 1, stop loading data
; must terminate the loop
<_loop1
#hrdf,x:hsr,_LBLA ; wait for data present
x:horx,p:(r0)+
; store in Program RAM
<exit
DSP56012 User's Manual
Bootstrap ROM Contents
;clear a0—Program RAM starting address
; configure Port B as Host Interface
; Exit bootstrap ROM
A-5

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