Motorola DSP56012 User Manual page 253

24-bit digital signal processor
Table of Contents

Advertisement

Application:
HI
DMA Off: 0 = interrupts disabled/1 = interrupts enabled
DMA On: 0 = Host
DMA Off: 0 = interrupts disabled/1 = interrupts enabled
DMA On: 0 = DSP
MOTOROLA
Processor Side
Receive Request Enable (RREQ)
DSP/1 = DSP
Transmit Request Enable (TREQ)
Host/1 = Host
Host Flags (HF0, HF1)
Write Only
Host Mode Control (HM0, HM1)
00 = DMA off/01 = 24 Bit DMA
10 = 16 Bit DMA/11 = 8 Bit DMA
Initialize (INIT)
Write Only
0 = no action/1 = initialize DMA
Interrupt Control Register (ICR)
Host Vector (HV[5:0])
Executive Interrupt Routine 0-63
Host Command (HC)
0 = Idle/1 = Interrupt DSP
Command Vector Register (CVR)
DSP56012 User's Manual
Host
DSP
7
INIT
$0 Read/Write
Reset = $00
* = Reserved, write as 0
Interrupt Control Register (ICR)
7
HC
$1 Read/Write
Reset = $17
* = Reserved, write as 0
Command Vector Register (CVR)
Programming Reference
Date:
Programmer:
Sheet 3 of 5
6
5
4
3
2
1
HM1
HMO
HF1
HF0
TREQ
*
0
6
5
4
3
2
1
HV5
HV4
HV3
HV2
HV1
*
0
0
RREQ
0
HV0
B-21

Advertisement

Table of Contents
loading

Table of Contents