Motorola DSP56012 User Manual page 241

24-bit digital signal processor
Table of Contents

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Mnemonic
BTST
#n,X:<aa>
#n,X:<pp>
#n,X:<ea>
#n,Y:<aa>
#n,Y:<pp>
#n,Y:<ea>
#n,D
CLR
D
CMP
S1,S2
CMPM
S1,S2
DEBUG
DEBUGcc
DEC
D
DIV
S,D
DO
X:<ea>,expr
X:<aa>,expr
Y:<ea>,expr
Y:<aa>,expr
#xxx,expr
S,expr
ENDDO
EOR
S,D
ILLEGAL
INC
D
Jcc
xxx
JCLR
#n,X:<ea>,xxxx
#n,X:<aa>,xxxx
#n,X:<pp>,xxxx
#n,Y:<ea>,xxxx
#n,Y:<aa>,xxxx
#n,Y:<pp>,xxxx
- indicates that the bit is unaffected by the operation
* indicates that the bit may be set according to the definition, depending on parallel move conditions
? indicates that the bit is set according to a special definition; see the instruction descriptions in Appendix A of
the DSP56000 Family Manual (DSP56KFAMUM/AD)
0 indicates that the bit is cleared
MOTOROLA
Table B-3 Instruction Set Summary (Sheet 2 of 7)
Syntax
Parallel Moves
(parallel move)
(parallel move)
(parallel move)
(parallel move)
DSP56012 User's Manual
Programming Reference
Instruction
Osc.
Status Request
Program
Clock
Words
Cycles
S L E U N Z V C
1+ea
4+mvb - * - - - - - ?
1+mv
2+mv
* * ? ? ? ? ? -
1+mv
2+mv
* * * * * * * *
1+mv
2+mv
* * * * * * * *
1
4
- - - - - - - -
1
4
- - - - - - - -
1
2
- * * * * * * *
1
2
- * - - - - ? ?
2
6+mv
* * - - - - - -
1
2
- - - - - - - -
1+mv
2+mv
* * - - ? ? 0 -
1
8
- - - - - - - -
1
2
- * * * * * * *
1+ea
4+jx
- - - - - - - -
2
6+jx
* * - - - - - -
Bits:
B-9

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