Juniper TX MATRIX Hardware Manual page 2

Juniper Networks, Inc.
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Sunnyvale, California 94089
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www.juniper.net
This product includes the Envoy SNMP Engine, developed by Epilogue Technology, an Integrated Systems Company. Copyright © 1986-1997,
Epilogue Technology Corporation. All rights reserved. This program and its documentation were developed at private expense, and no part
of them is in the public domain.
This product includes memory allocation software developed by Mark Moraes, copyright © 1988, 1989, 1993, University of Toronto.
This product includes FreeBSD software developed by the University of California, Berkeley, and its contributors. All of the documentation
and software included in the 4.4BSD and 4.4BSD-Lite Releases is copyrighted by the Regents of the University of California. Copyright ©
1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994. The Regents of the University of California. All rights reserved.
GateD software copyright © 1995, the Regents of the University. All rights reserved. Gate Daemon was originated and developed through
release 3.0 by Cornell University and its collaborators. Gated is based on Kirton's EGP, UC Berkeley's routing daemon (routed), and DCN's
HELLO routing protocol. Development of Gated has been supported in part by the National Science Foundation. Portions of the GateD
software copyright © 1988, Regents of the University of California. All rights reserved. Portions of the GateD software copyright © 1991, D.
L. S. Associates.
This product includes software developed by Maker Communications, Inc., copyright © 1996, 1997, Maker Communications, Inc.
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6,429,706, 6,459,579, 6,493,347, 6,538,518, 6,538,899, 6,552,918, 6,567,902, 6,578,186, and 6,590,785.
TX Matrix Internet Router Hardware Guide
Copyright © 2010, Juniper Networks, Inc.
All rights reserved. Printed in USA.
Writing: Elizabeth Gardner, Jerry Isaac
Editing: Fran Mues
Illustration: Faith Bradford Brown
Cover Design: Edmonds Design
Revision History
October 2010—Corporate rebranding. Updated fiber-optic cleaning procedures. Minor edits.
December 2009—Converted to topics.
October 2009—Updated the description of the 12 m fiber-optic array cable.
31 December 2008—530-021926-01. Revision 2. Added support of the three-input 240-A power supply in two-input mode for Junos OS
Release 9.2 and later.
5 October 2007— 530-021926-01. Revision 1. Updated Junos OS release recommendation for graceful switchover, fiber-optic cleaning and
cabling instructions, DC input voltage specification, torque specification for securing the cable to a DC power supply, description of the
routing engines, taking the host subsystem offline procedure, replacing a DC power cable procedure, and maintaining the power supplies
section. Added information about nonstop active routing.
28 August 2005—530-011711-01. Revision 5. Corrected "Routing Matrix Architecture" and "Routing Matrix Control Plane Architecture" figures,
revised the description of the system architecture, and added a paragraph to "Running Different Junos OS releases on the Routing Engines."
5 January 2005— 530-011711-01. Revision 4.
9 December 2004—530-011711-01. Revision 3. Corrected "Chassis Dimensions and Clearance Requirements" figure, changed TX-CIP power
requirements, and made general updates.
3 December 2004—530-011711-01. Revision 2.
12 November 2004—530-011711-01. Revision 1.
ii Copyright © 2010, Juniper Networks, Inc.