Kr Ethernet - ADLINK Technology AMD COM Express Express-VR7 User Manual

Express-VR7 User's Guide
4.4.3 10G-KR Ethernet
Name Pin #
10G_KR_RX0+ C49
10G_KR_RX0- C50
10G_KR_RX1+ C42
10G_KR_RX1- C43
10G_KR_TX0+ D49
10G_KR_TX0- D50
10G_KR_TX1+ D42
10G_KR_TX1- D43
10G_KR_RX2+ C29
10G_KR_RX2- C30
10G_KR_RX3+ C26
10G_KR_RX3- C27
10G_KR_TX2+ D29
10G_KR_TX2- D30
10G_KR_TX3+ D26
10G_KR_TX3- D27
CEI_INT# C47
CEI_MDIO D46
CEI_MDC C46
10G_SDP0 C40
D40
10G_SDP1
C17
10G_SDP2
D17
10G_SDP3
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Description
10GBASE-KR ports, Receive Input differential pairs
10GBASE-KR ports, Transmit Output differential pairs
10GBASE-KR ports, Receive Input differential pairs
10GBASE-KR ports, Transmit Output differential pairs
Active low interrupt input to Module from Carrier based I2C I/O
expander
MDIO data – for PHY setup
MDIO clock - for PHY setup
Software-Definable Pins
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I/O PU / PD Comment
I KR AC coupled on Module
O KR AC coupled on Carrier
I KR Not supported
O KR Not supported
I 3.3VSB PU 10K
3.3VSB
I/O 3.3VSB PU 1K TBD, it will be fine tune during
3.3VSB development stage
O 3.3VSB PU 1K TBD, it will be fine tune during
3.3VSB development stage
I/O 3.3VSB
PICMG COM.0 R3.1