ADLINK Technology AMD COM Express Express-VR7 User Manual page 30

Express-VR7 User's Guide
Name Pin # Description
PCIE_RX9+ B74 PCI Express channel 9, Receive Input differential pair.
PCIE_RX9- B75
PCIE_TX10+ A77 PCI Express channel 10, Transmit Output differential pair.
PCIE_TX10- A78
PCIE_RX10+ B77 PCI Express channel 10, Receive Input differential pair.
PCIE_RX10- B78
PCIE_TX11+ A81 PCI Express channel 11, Transmit Output differential pair.
PCIE_TX11- A82
PCIE_RX11+ B81 PCI Express channel 11, Receive Input differential pair.
PCIE_RX11- B82
PCIE_TX12+ A39 PCI Express channel 12, Transmit Output differential pair.
PCIE_TX12- A40
PCIE_RX12+ B39 PCI Express channel 12, Receive Input differential pair.
PCIE_RX12- B40
PCIE_TX13+ A36 PCI Express channel 13, Transmit Output differential pair.
PCIE_TX13- A37
PCIE_RX13+ B36 PCI Express channel 13, Receive Input differential pair.
PCIE_RX13- B37
PCIE_TX14+ A25 PCI Express channel 14, Transmit Output differential pair.
PCIE_TX14- A26
PCIE_RX14+ B25 PCI Express channel 14, Receive Input differential pair.
PCIE_RX14- B26
PCIE_TX15+ A22 PCI Express channel 15, Transmit Output differential pair.
PCIE_TX15- A23
PCIE_RX15+ B22 PCI Express channel 15, Receive Input differential pair.
PCIE_RX15- B23
PCIE_CLK_REF+ A88 PCI Express Reference Clock output for all PCI Express and PCI
PCIE_CLK_REF- A89 Express Graphics Lanes.
PCIE_CLK_REF1+ B29 Second reference clock output for higher speed PCI Express
PCIE_CLK_REF1- B30 implementation on Lanes 16 to 31, for Type 7 implementations
only
Page 30 Copyright © 2024 ADLINK Technology, Inc.
I/O PU / PD Comment
Not supported
I PCIE
Not supported
O PCIE
Not supported
I PCIE
Not supported
O PCIE
Not supported
I PCIE
Not supported
O PCIE
Not supported
I PCIE
Not supported
O PCIE
Not supported
I PCIE
Not supported
O PCIE
Not supported
I PCIE
Not supported
O PCIE
Not supported
I PCIE
O PCIE
O PCIE
PICMG COM.0 R3.1