Memory; Pcie Or Pci/Pci-X Interface - Matrox Helios Series Installation And Hardware Reference

Memory

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Memory
Matrox Helios supports up to 1 Gbyte of linearly addressable, DDR SDRAM
main memory (also referred to as processing memory). Main memory is accessed
through Matrox Oasis. Matrox Oasis has a 167 MHz 128-bit DDR interface to
1
main memory, for data transfers at a rate of up to 5.3 Gbytes/sec. Main memory
holds image and post-processing result data.
By default, some main memory is mapped onto the PCI bus so that you can use
a Host pointer to access this memory, or you can access it directly from another
PCIe/PCI/PCI-X bus master; this memory is referred to as shared memory. To
allocate a buffer in shared memory, use the MIL-Lite function MbufAlloc...() with
. To increase or decrease the amount of shared memory, use the
M_SHARED
MILConfig utility. If your application accesses multiple boards that have their
memory mapped onto the PCI bus, ensure that the total amount of memory
mapped onto the PCI bus does not exceed the maximum address space available
to your application.

PCIe or PCI/PCI-X interface

Matrox Helios uses PCI-X technology to communicate on-board. PCI-X is a
high-performance backwards-compatible enhancement to the conventional PCI
bus specification. To communicate with the Host, Matrox Helios eCL, eA, and
eD can transfer data using the Host's PCIe bus. Matrox Helios XCL, XA, and XD
can transfer data using either the Host's PCI or PCI-X bus, depending on the slot
used by the board.
On Matrox Helios eCL, eA, and eD, a PCI-X to PCIe bridge handles the
connection to the Host. On Matrox Helios XCL, XA, and XD, a standard PCI-X
to PCI-X bridge handles the PCI/PCI-X connection.
Using the Host PCIe/PCI/PCI-X bus, Matrox Helios can copy data between its
main memory, the Host, and any other memory mapped onto the
PCIe/PCI/PCI-X bus. The PCIe/PCI/PCI-X bus connects all Matrox Helios
components to the Host, and to peripherals such as a display board.
1. Depends on version and revision of the board.