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120 Appendix B: Technical information
Pin
Signal
1
P1_TTL_AUX_IO_1
2
P1_LVDS_AUX_OUT1+
3
P0_LVDS_AUX_OUT1-
4
P0_LVDS_AUX_OUT0-
5
P1_LVDS_HSYNC_OUT-
6
P1_LVDS_HSYNC_OUT+
7
P1_LVDS_CLK_OUT+
8
OPTO_AUX_IN0-
9
NC
10
NC
External auxiliary I/O connector 0
External auxiliary I/O connector 0 is a high-density DB-44 female connector,
located on the bracket of the cable adapter board. It is used to transmit timing
and synchronization signals, and transmit/receive auxiliary signals. It interfaces
with the 50-pin internal auxiliary I/O connector on the board, making the I/O
signals accessible outside the computer enclosure.
The pinout for this connector is as follows. The description of each (positive)
auxiliary signal states whether the signal is specific to an independent acquisition
path and the type of signals that can be routed onto it.
15
30
44
Description
TTL auxiliary input/output 1 for acq. path 1.
Supported signals: exposure output 0, trigger input 1, user input/output 3.
LVDS auxiliary output 1 for acq. path 1 (positive).
Supported signals: exposure output 1, user output 6.
LVDS auxiliary output 1 for acq. path 0 (negative).
See pin 19 for more information.
LVDS auxiliary output 0 for acq. path 0 (negative).
See pin 20 for more information.
HSYNC output for acq. path 1 (negative).
See pin 6 for more information.
HSYNC output for acq. path 1 (positive).
Clock output for acq. path 1 (positive).
Opto-isolated auxiliary input 0 for an unspecified acq. path (negative).
See pin 24 for more information.
Not connected.
Not connected.
1
16
31
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