Matrox Helios Series Installation And Hardware Reference page 69

Type of signal
VSYNC 0 1 in +1 out
1 1 in + 1 out
2 1 in + 1 out
3 1 in + 1 out
CSYNC or 0 1 in + 1 out
4
HSYNC
1 1 in + 1 out
2 1 in + 1 out
3 1 in + 1 out
Clock 0 1 in/out
1 1 in/out
2 1 in/out
3 1 in/out
1. The maximum # for each signal type cannot always be attained. The actual maximum depends on whether the required auxiliary signals are available or have been
defined as another type.
2. In this column, each signal is a dedicated signal (that is, it cannot be redefined as another type of signal). These signals can be accessed from the DVI connectors;
the clock signal can also be accessed from the internal auxiliary I/O connector.
3. On external auxiliary I/O connector 0 (DB-44).
4. The board can accept an HSYNC or CSYNC input signal, but it can only output an HSYNC signal.
Auxiliary signals
TTL/LVDS dedicated
2
input/output signals
P0_LVDS_TTL_VSYNC_IO
P1_LVDS_TTL_VSYNC_IO
P2_LVDS_TTL_VSYNC_IO
P3_LVDS_TTL_VSYNC_IO
P0_LVDS/TTL_CHSYNC_IO
P1_LVDS/TTL_CHSYNC_IO
P2_LVDS/TTL_CHSYNC_IO
P3_LVDS/TTL_CHSYNC_IO
P0_LVDS/TTL_CLK_IO
P1_LVDS/TTL_CLK_IO
P2_LVDS/TTL_CLK_IO
P3_LVDS/TTL_CLK_IO
The board supports auxiliary multi-purpose input and output signals. Auxiliary
output signals can be routed as exposure signals or user-defined signals (for
controlling external devices, such as a strobe light or PLC). Auxiliary input signals
can be routed as trigger input (for example, to synchronize image acquisition with
external events), quadrature input, field polarity, data valid, timer clock input, or
user-defined signals (for example, to synchronize an application with a
user-defined event).
Matrox Helios eA/XA acquisition section
3
TTL/LVDS aux. input
in
in
in
in
in
in
in
TTL/LVDS aux. output
out
out
in
out
out
out
69
3
out
out
out