Matrox Helios Series Installation And Hardware Reference page 144

144 Appendix B: Technical information
Pin Signal
99 P1_TTL_AUX(TRIG)_IO
100 GND
Pin Signal
1 P2_LVDS_DATA_IN0+
2 P2_LVDS_DATA_IN0-
3 P2_LVDS_DATA_IN1+
4 P2_LVDS_DATA_IN1-
5 P2_LVDS_DATA_IN2+
6 P2_LVDS_DATA_IN2-
7 P2_LVDS_DATA_IN3+
8 P2_LVDS_DATA_IN3-
9 P2_LVDS_DATA_IN4+
10 P2_LVDS_DATA_IN4-
11 P2_LVDS_DATA_IN5+
12 P2_LVDS_DATA_IN5-
13 P2_LVDS_DATA_IN6+
14 P2_LVDS_DATA_IN6-
15 P2_LVDS_DATA_IN7+
16 P2_LVDS_DATA_IN7-
17 P2_LVDS_DATA_IN8+
18 P2_LVDS_DATA_IN8-
19 P2_LVDS_DATA_IN9+
20 P2_LVDS_DATA_IN9-
21 P2_LVDS_DATA_IN10+
22 P2_LVDS_DATA_IN10-
23 P2_LVDS_DATA_IN11+
24 P2_LVDS_DATA_IN11-
25 P2_LVDS_DATA_IN12+
26 P2_LVDS_DATA_IN12-
27 P2_LVDS_DATA_IN13+
Description
TTL auxiliary input/output for acq. path 1.
Supported signals: trigger input 1 (main purpose), user input 3, or user output 5.
Ground
Connector 1 has the following pinout:
Description
Data bit 0 for acq. path 2, in LVDS format (positive).
Data bit 0 for acq. path 2, in LVDS format (negative).
Data bit 1 for acq. path 2, in LVDS format (positive).
Data bit 1 for acq. path 2, in LVDS format (negative).
Data bit 2 for acq. path 2, in LVDS format (positive).
Data bit 2 for acq. path 2, in LVDS format (negative).
Data bit 3 for acq. path 2, in LVDS format (positive).
Data bit 3 for acq. path 2, in LVDS format (negative).
Data bit 4 for acq. path 2, in LVDS format (positive).
Data bit 4 for acq. path 2, in LVDS format (negative).
Data bit 5 for acq. path 2, in LVDS format (positive).
Data bit 5 for acq. path 2, in LVDS format (negative).
Data bit 6 for acq. path 2, in LVDS format (positive).
Data bit 6 for acq. path 2, in LVDS format (negative).
Data bit 7 for acq. path 2, in LVDS format (positive).
Data bit 7 for acq. path 2, in LVDS format (negative).
Data bit 8 for acq. path 2, in LVDS format (positive).
Data bit 8 for acq. path 2, in LVDS format (negative).
Data bit 9 for acq. path 2, in LVDS format (positive).
Data bit 9 for acq. path 2, in LVDS format (negative).
Data bit 10 for acq. path 2, in LVDS format (positive).
Data bit 10 for acq. path 2, in LVDS format (negative).
Data bit 11 for acq. path 2, in LVDS format (positive).
Data bit 11 for acq. path 2, in LVDS format (negative).
Data bit 12 for acq. path 2, in LVDS format (positive).
Data bit 12 for acq. path 2, in LVDS format (negative).
Data bit 13 for acq. path 2, in LVDS format (positive).