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Matrox Helios Series Installation And Hardware Reference

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Matrox Helios
Installation and Hardware Reference
Manual no. 10879-101-0301
January 8, 2013

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  • Page 1 Matrox Helios Installation and Hardware Reference Manual no. 10879-101-0301 January 8, 2013...
  • Page 2 © Copyright Matrox Electronic Systems Ltd., 2003-2013. All rights reserved. Limitation of Liabilities: In no event will Matrox or its suppliers be liable for any indirect, special, incidental, economic, cover or consequential damages arising out of the use of...

  • Page 3: Table Of Contents

    Inspecting the Matrox Helios package ........
  • Page 4 Matrox Helios eA/XA acquisition section ........59...
  • Page 5 Matrox Helios eD/XD acquisition section ....... . 73 Performance ..........75 Video sources supported .
  • Page 6 Connectors on Matrox Helios eCL/XCL ....... . . 117 Camera Link video input connectors ......118 External auxiliary I/O connector 0 .
  • Page 7 Regulatory compliance for Matrox Helios eCL, eA, eD, and XA Regulatory compliance for Matrox Helios XCL and XD Limited Warranty...

  • Page 9: Chapter 1: Introduction

    Chapter Introduction Chapter 1: This chapter briefly describes the features of the Matrox Helios board, as well as the software that can be used with the board.

  • Page 10: Matrox Helios Boards

    PCI-X compliant, single-slot, frame grabbers. The PCIe compliant boards are Matrox Helios eCL, Matrox Helios eA, and Matrox Helios eD. The PCI-X compliant frame grabbers are Matrox Helios XCL, Matrox Helios XA, and Matrox Helios XD. The PCIe compliant boards provide the exact same features as the related PCI-X boards, except for the way the boards connect to the Host bus.
  • Page 11 Matrox Helios boards UART Matrox Helios eCL/XCL dual-Base SerTFG LVDS driver PSG #1 & receiver SerTC Second MDR-26 LVDS On-board Cam Ctrl (4) connector drivers main memory (128/256 MB Clock 512 MB/1 GB) ChannelLink LUTs Data (24) Receiver #2 128 DDR Video &...
  • Page 12 12 Chapter 1: Introduction Matrox Helios eCL/XCL single-Full On-board main memory Clock ChannelLink (128 MB/256 MB) Data (16) Receiver #3 512 MB/1 Gb Second & Syncs (4) MDR-26 128 DDR Video (up to 5.3 GB/s) connector Clock ChannelLink LUTs Data (24)

  • Page 13: Acquisition With Matrox Helios Ea/Xa

    Matrox Helios boards Acquisition with Matrox Helios eA/XA Matrox Helios eA/XA is a high-performance analog frame grabber, capable of high frequency and high fidelity simultaneous acquisition from up to four independent video sources. For added flexibility, each acquisition path has an input selector that can switch between receiving input from one of two video sources, for example, you can connect two 4-tap video sources and switch between them.

  • Page 14: Acquisition With Matrox Helios Ed/Xd

    14 Chapter 1: Introduction Acquisition with Matrox Helios eD/XD Matrox Helios eD/XD is a high-performance digital frame grabber, capable of image acquisition across four synchronous or asynchronous digital channels. Each channel is 16-bits wide and can capture video from LVDS or RS-422 digital video sources, depending on the version of Matrox Helios eD/XD purchased.

  • Page 15: Processing Capabilities

    Oasis ASIC. Using this ASIC, Matrox Helios can preprocess and format grabbed data before transferring it to the Host. ❖ Although the Host can also transfer images to Matrox Helios, and use Matrox Oasis to perform some time consuming supported processing operations, this is typically not recommended.

  • Page 16: Main Memory

    • LVDS or RS-232 compatible serial interfaces (the number depends on the type and version of Matrox Helios). Each interface is mapped as a COM port so that it can be accessed through the Win32 API. The serial interface can both receive and transmit signals, in full-duplex mode.

  • Page 17: Data Transfer

    1. Although not documented prior to revision 10879-101-0200 of the manual, a quadrature decoder has been featured in the PSGs of Matrox Helios frame grabbers since the first revision of their PCB. 2. 5 V from revision 1 of Matrox Helios XCL; revision 0 is only 3.3 V PCI tolerant.

  • Page 18: Software

    18 Chapter 1: Introduction Software To operate Matrox Helios, you can purchase one or more Matrox Imaging software products that supports the board. These are the Matrox Imaging Library (MIL) and its derivatives (MIL-Lite, ActiveMIL, ActiveMIL-Lite, and Matrox Inspector). All Matrox software is supported under Windows; consult your software manual for supported Windows environments.

  • Page 19: Essentials To Get Started

    • A CD drive, and a hard disk or network drive on which to install the Matrox Helios software. 1. 5 V starting from revision 1 of the Matrox Helios PCB; revision 0 is only 3.3 V PCI tolerant.

  • Page 20: Inspecting The Matrox Helios Package

    You should receive the following items: Standard items • The Matrox Helios eCL, eA, eD, XCL, XA, or XD board, depending on which was ordered. If you purchased a Matrox Helios eD/XD, make sure you have received the appropriate version (LVDS or RS-422) of the board.

  • Page 21: Handling Components

    (DVI-I to DVI-I or DVI-A to DVI-A cable) if the display board encodes the synchronization signals on the video data (sync on green). Otherwise, you must use the Matrox DVI-TO-8BNC/O cable or a custom cable that re-routes the synchronization signals to the appropriate pins.
  • Page 22 To do so, you should first complete and submit the online Technical Support Request Form, accessible from the above-mentioned page. Once the information is submitted, a Matrox support agent will contact you shortly thereafter by email or phone, depending on the problem.

  • Page 23: Chapter 2: Hardware Installation

    Chapter Hardware Chapter 2: installation This chapter explains how to install your Matrox Helios board in your computer.

  • Page 24: Installing Your Matrox Helios Board

    3.3 Volt/64-bit PCI/PCI-X Slot 3.3 Volt key 64-bit 32-bit extension 5 Volt key 5 Volt/64-bit PCI Slot 1. 5 V starting from revision 1 of the Matrox Helios PCB; revision 0 is only 3.3 V PCI tolerant.
  • Page 25 Some computers have a large, black-ridged heat sink that prevents long boards from using some of the PCI board slots. Matrox Helios must not touch the heat sink. Therefore, choose a slot where the board completely avoids it. If you cannot find a suitable slot, contact your computer dealer.
  • Page 26 26 Chapter 2: Hardware installation 5. Position your Matrox Helios board in the selected slot, and then press the board firmly but carefully into the connector of the slot. When installing Matrox Helios in a conventional 32-bit slot, only the 32-bit portion of the edge connector is connected in the slot.

  • Page 27: Installing The Cables For Watchdog Functionality

    4. Disconnect the end of the Reset button cable currently attached to your motherboard reset connector, and attach Cable B to this connector instead. 1. Starting from revision 1 of the Matrox Helios XCL PCB; whereas, present on the Matrox Helios XA PCB as of revision 0.

  • Page 28: Installing An I/O Adapter Board

    28 Chapter 2: Hardware installation 5. Connect Cable A to the B pin-pair of the system reset connector of Matrox Helios. Matrox Helios eCL/XCL Matrox Helios eA/XA Matrox Helios eD/XD 6. Connect Cable B to the A pin-pair of the system reset connector of the Matrox Helios.
  • Page 29 Installing an I/O adapter board 2. If you are installing the I/O adapter board of Matrox Helios eA/XA and the slot that you have selected for the board is not a PCIe/PCI/PCI-X slot, break off the board’s tab if it interferes with other components in the computer. The tab was added so that if used in a PCIe/PCI/PCI-X slot, the board would have extra support and be more sturdy.
  • Page 30 30 Chapter 2: Hardware installation 4. Connect the other end of the flat ribbon cable to the internal auxiliary I/O connector of the I/O adapter board. Position the connectors so that their triangular etchings face each other. The etchings indicate the location of pin 1.
  • Page 31 Installing an I/O adapter board 5. If you are installing the I/O adapter board of Matrox Helios eA/XA in a PCIe/PCI/PCI-X slot, align the board’s tab with the slot’s connector, and then press the board firmly but carefully into the slot’s connector. For other types of slots or when installing the I/O adapter board of Matrox Helios eCL/XCL, slide the board’s bracket into the opening at the back of the selected slot.

  • Page 32: Installing The Digital Video Adapter Board

    2. Then, connect the flat ribbon cable to the internal digital video input connector of the Matrox Helios frame grabber. To do so, position the cable so that red wire is on the same side as the bracket of the Matrox Helios eD/XD board.

  • Page 33: Connecting Video Sources

    • System reset connector. Used to reset the motherboard if the reset button is pressed or the Watchdog circuitry of Matrox Helios detects abnormal Host inactivity. To access the signals of the internal auxiliary I/O connector from outside of the computer enclosure, you might have installed the corresponding adapter board.
  • Page 34 Connector #1 Connector #1 Depending on if you are using the single-Full or dual-Base version of Matrox Helios eCL/XCL, you can connect one or two video sources to the pair of Camera Link connectors, respectively. Use standard Camera Link cables. You can purchase such a cable from your video source manufacturer, 3M Interconnect Solutions for Factory Automation, Intercon 1, or other third parties.

  • Page 35: Connecting To Matrox Helios Ea/Xa

    • System reset connector . Used to reset the motherboard if the reset button is pressed or the Watchdog circuitry of Matrox Helios detects abnormal Host inactivity. To access the signals of the internal auxiliary I/O connector from outside of the computer enclosure, you might have installed the corresponding adapter board.
  • Page 36 Connector #0 Connector #1 You can use the Matrox DVI-TO-8BNC/O cable to connect to your video sources. The cable has a DVI connector on one end and both 8 BNCs and open-ended wires on the other end; the open-ended wires allow you to connect to some timing, synchronization, and control signals of the frame grabber.
  • Page 37 Connecting video sources Connect the cable’s DVI connector to one of the DVI connectors on Matrox Helios eA/XA. Then, connect the BNC connectors as follows: BNC label Signal on DVI connector 0 Signal on DVI connector 1 Expected input, with respect to the DVI connector.

  • Page 38: Connecting To Matrox Helios Ed/Xd

    • System reset connector. Used to reset the motherboard if the reset button is pressed or the Watchdog circuitry of Matrox Helios detects abnormal Host inactivity. To access the signals of the internal digital video input connector from outside of the computer enclosure, you might have installed the digital video input adapter board.
  • Page 39 (acq. path 0 & 1) connector #1 You can use the Matrox DBHD100-TO-OPEN cable to connect your video sources to a digital video input connector. This cable has a 100-pin low-profile IDC connector at one end, and open-ended wires at the other end.
  • Page 40 40 Chapter 2: Hardware installation...

  • Page 41: Chapter 3: Using Multiple Matrox Helios Boards

    Chapter Using multiple Chapter 3: Matrox Helios boards This chapter explains how to use multiple Matrox Helios boards.

  • Page 42: Multiple Board Installation

    (refer to the Installing your Matrox Helios board section, in Hardware installation). Theoretically, you can have up to 16 Matrox Helios boards installed in your computer at one time; this is discussed in the next section.
  • Page 43 Simultaneous image capture from different boards Helios XCL, XA, or XD board, you should not have problems with dropped frames. The list of platforms known to be compatible with Matrox Helios are available on the Matrox web site, under the board’s compatibility list.
  • Page 44 44 Chapter 3: Using multiple Matrox Helios boards...

  • Page 45: Chapter 4: Matrox Helios Hardware Reference

    Chapter Matrox Helios Chapter 4: hardware reference This chapter explains the architecture, features, and modes of the Matrox Helios eCL/XCL, eA/XA, and eD/XD hardware.

  • Page 46: Matrox Helios Hardware Reference

    PCI-X to PCIe (eCL, eA, or eD) or PCI-X to PCI-X (XCL, XA, or XD) Bridge (up to 1 GB/s) Host PCIe/PCI/PCI-X bus A summary of the features of Matrox Helios, as well as pin assignments for the various connectors, can be found in Technical information.

  • Page 47: Acquisition Path

    MIL-Lite function. For more specialized adjustments, use the Matrox Intellicam program to adjust the DCF file. Using Matrox Intellicam, you can set the active video region, the sampling clock, and all the other parameters related to the timing of the video signal (that is, standard and non-standard video, interlaced or non-interlaced) in your DCF file.

  • Page 48: Matrox Helios Ecl/Xcl Acquisition Section

    Matrox Helios eCL/XCL is available in two versions: a dual-Base version and a single-Full version. The dual-Base version has two independent Camera Link acquisition paths that feature two Base configurations. The single-Full version has one acquisition path that supports all configurations: Base, Medium, and Full.

  • Page 49: Dual-Base Version

    Matrox Helios eCL/XCL acquisition section Dual-Base version The dual-Base version supports simultaneous acquisition from two video sources, for a maximum of 24 bits of video data from each. When acquiring from time-multiplexed video sources, a maximum of 32 bits of video data is supported from each.

  • Page 50: Single-Full Version

    50 Chapter 4: Matrox Helios hardware reference Single-Full version The single-Full version allows you to grab from one video source, up to 64 bits of video data. The video source can be a frame, field, or line-scan video source. Note that in the Medium and Full configuration, one video source uses the two Camera Link connectors.

  • Page 51: Video Sources Supported By The Dual-Base Version

    Matrox Helios eCL/XCL acquisition section Video sources supported by the dual-Base version The dual-Base version accepts the following video sources for each acquisition path: Video sources supported per acquisition path Camera Link Standard • One tap x 8/10/12/14/16-bit. • Two tap x 8/10/12-bit.

  • Page 52: Demultiplexers

    52 Chapter 4: Matrox Helios hardware reference Demultiplexers Each acquisition path of the board features a demultiplexer. It can deserialize input from time-multiplexed video sources on a clock basis; time-multiplexed video sources can output twice the amount of data as other video sources with less cabling.

  • Page 53: Communication

    These are general-purpose signals that are sent to the video source. UARTs The dual-Base version of Matrox Helios eCL/XCL offers two LVDS compatible serial interfaces, whereas the single-Full version features only one. Each interface is mapped as a COM port so that it can be accessed through the Win32 API. Each interface is comprised of both a transmit port and a receive port, permitting the interface to work in full-duplex mode.

  • Page 54: Synchronization And Control Signals

    Synchronization and control signals The following tables summarize the synchronization, timing, and control signals supported by Matrox Helios eCL/XCL. Most of these signals are available by defining camera control or auxiliary (general purpose) signals as such in the DCF. When an acquisition path supports several signals of a specific type, the tables identify the one to which an auxiliary/camera control signal can be defined.
  • Page 55 Matrox Helios eCL/XCL acquisition section LVDS cam. ctrl Received with data LVDS dedicated signals CL connect. 0 CL connect. 1 Type of signal Frame valid input VSYNC output P0_LVDS_VSYNC_OUT P1_LVDS_VSYNC_OUT Line valid input HSYNC output P0_LVDS_HSYNC_OUT P1_LVDS_HSYNC_OUT Data valid input Clock input Xclk (CL connect.
  • Page 56 56 Chapter 4: Matrox Helios hardware reference synchronize image acquisition with external events), quadrature input, field polarity, timer clock input, or user-defined signals (for example, to synchronize an application with a user-defined event). The board supports auxiliary signals in different formats:...
  • Page 57 Matrox Helios eCL/XCL acquisition section - Level-sensitive continuous acquisition. The board grabs continuously while the level of the trigger is high/low. The polarity of the active and inactive levels of the trigger signal is software ❖ programmable. • Asynchronous reset mode. In this mode, the board resets the video source to begin a new frame when the trigger signal is received.
  • Page 58 58 Chapter 4: Matrox Helios hardware reference For each PSG, the board can supply one horizontal (HSYNC) and one vertical Synchronization (VSYNC) synchronization signal to the video source. Through the Camera Link connectors, the board also receives synchronization data (frame valid, line valid, and data valid) along with the video data;...

  • Page 59: Matrox Helios Ea/Xa Acquisition Section

    8 bits or all 10 bits can be stored. Each acquisition path has its own filters, programmable gain, and LUTs. Matrox Helios eA/XA supports video sources with up to 4 taps, and can grab at a maximum rate of 80 Mega-samples/sec. By driving the same video signal to A/Ds that are using two phase-shifted timing sources, you can double the nominal acquisition rate.

  • Page 60: Performance

    60 Chapter 4: Matrox Helios hardware reference In addition, Matrox Helios eA/XA has a comprehensive set of general purpose I/O and serial ports to control video sources and other devices. VID_IN Attenuator, offset, Input LVDS/TTL 10-bit pass Aux In(8) LUTs...

  • Page 61: Analog Input

    Matrox Helios eA/XA acquisition section Analog input Matrox Helios eA/XA includes the electronic circuitry needed to select, amplify, filter, and drive the video signal prior to sending it to the analog-to-digital (A/D) converters. Matrox Helios eA/XA has four wide-band analog acquisition paths. The following...
  • Page 62 62 Chapter 4: Matrox Helios hardware reference Input voltage level and protection The various amplification stages on Matrox Helios eA/XA are able to provide a maximum peak signal of 3 V without saturation. Any positive video signal level greater than this threshold will be distorted, so it is not recommended to feed a signal above 3 V with termination (6 V unterminated).
  • Page 63 For each acquisition path, you can adjust the signal’s black and white reference levels so that the full dynamic range of each 10-bit A/D is used. Matrox Helios eA/XA uses the offset-gain topology to adjust the black and white reference levels of the signal.
  • Page 64 A/D converter. Each acquisition path has two filters. The filters used on Matrox Helios are 4th order Butterworth filters. The first has a -3 dB cutoff frequency of 40 MHz. The second filter has a -3 dB cutoff frequency of 7.5 MHz, useful for RS-170 and CCIR video sources.

  • Page 65: Uarts

    Matrox Helios eA/XA acquisition section Lookup tables Matrox Helios eA/XA has programmable lookup tables (LUTs). The LUTs can be operated as one, two, three, or four 1024 entry 8- or 16-bit LUTs. The LUTs are programmed using the MIL-Lite function MdigLut().
  • Page 66 Synchronization and control signals The following tables summarize the synchronization, timing, and control signals supported by Matrox Helios eA/XA. Most of these signals are available by defining auxiliary (general purpose) signals as such in the DCF. When an acquisition path...
  • Page 67 Matrox Helios eA/XA acquisition section auxiliary signal can be defined. For example, for acquisition path 0, you can define P0_TTL/LVDS_AUX_OUT_0 as exposure output 0 and P0_TTL/LVDS_AUX_OUT_1 as exposure output 1. Note that only the auxiliary signals of the first acquisition path used by a video source are available (for example, if grabbing RGB and monochrome, only the auxiliary signals for path 0 and path 3 are available).
  • Page 68 68 Chapter 4: Matrox Helios hardware reference TTL aux. Opto aux. TTL aux. output TTL/LVDS aux. input TTL/LVDS aux. output input input Type of signal Data valid input Timer clock input Quadrature input User input User output 1. The maximum # for each signal type cannot always be attained. The actual maximum depends on whether the required auxiliary signals are available or have been defined as another type.
  • Page 69 Matrox Helios eA/XA acquisition section TTL/LVDS dedicated TTL/LVDS aux. input TTL/LVDS aux. output input/output signals Type of signal VSYNC 1 in +1 out P0_LVDS_TTL_VSYNC_IO 1 in + 1 out P1_LVDS_TTL_VSYNC_IO 1 in + 1 out P2_LVDS_TTL_VSYNC_IO 1 in + 1 out...
  • Page 70 70 Chapter 4: Matrox Helios hardware reference The board supports auxiliary signals in different formats: Auxiliary signals # per path # total Auxiliary input signals that can be defined as either TTL or LVDS. depends on type of signal Opto-isolated auxiliary input signals.
  • Page 71 Matrox Helios eA/XA acquisition section Each PSG can accept or provide one pixel clock signal (slave or master mode). Clock Important When accessed from the analog video input connectors (DVI), the pixel clock, composite/horizontal synchronization, and vertical synchronization signals of each PSG form a group of signals.
  • Page 72 72 Chapter 4: Matrox Helios hardware reference When received in TTL format directly, the signal must have a maximum Trigger format amplitude of 5 V; when received in LVTTL format directly, the signal must have a maximum amplitude of 3.3 V. A signal over 2 V is considered high, while anything less than 0.8 V is considered low;...

  • Page 73: Matrox Helios Ed/Xd Acquisition Section

    DCF file. Matrox Helios eD/XD acquisition section Matrox Helios eD/XD can capture video from LVDS or RS-422 digital video sources, depending on the version of the board purchased; unless otherwise specified, discussions of the LVDS version apply to the RS-422 version.
  • Page 74 32 MHz for RS-422. Each acquisition path has its own programmable synchronization generator (PSG) and LUTs, and can have a different acquisition rate. Matrox Helios eD/XD supports a comprehensive set of general purpose I/O and serial ports to control video sources and other devices.

  • Page 75: Performance

    480 Mbytes/sec for LVDS 256 Mbytes/sec for RS-422 Video sources supported Matrox Helios eD/XD has four, 16-bit, synchronous or asynchronous, digital acquisition paths. The following tables describe the video source combinations from which simultaneous, independent acquisition is supported and the acquisition paths (P#) to which they must be connected.

  • Page 76: Uarts

    PSGs Each acquisition path has its own programmable synchronization generator (PSG). The PSGs allow Matrox Helios eD/XD to adapt to many video standards. The PSGs are responsible for managing all video timing, synchronization, trigger, exposure, and user-defined input and output signals.

  • Page 77: Synchronization And Control Signals

    Synchronization and control signals The following tables summarize the synchronization, timing, and control signals supported by Matrox Helios eD/XD. Most of these signals are available by defining auxiliary (general purpose) signals as such in the DCF. When an acquisition path supports several signals of a specific type, the tables identify the one to which an auxiliary signal can be defined.
  • Page 78 78 Chapter 4: Matrox Helios hardware reference LVDS aux. input LVDS/TTL aux. input Opto aux. input TTL aux. I/O Type of signal Timer clock input Quadrature input User input 10 11 4 10 11 10 11 10 11 1 1. The maximum # for each signal type cannot always be attained. The actual maximum depends on whether the required auxiliary signals are available or have been defined as another type.
  • Page 79 Matrox Helios eD/XD acquisition section TTL Aux. LVDS aux. output LVDS/TTL aux. output TTL aux. output Type of signal Exposure output User output 1. The maximum # for each signal type cannot always be attained. The actual maximum depends on whether the required auxiliary signals are available or have been defined as another type.
  • Page 80 80 Chapter 4: Matrox Helios hardware reference LVDS dedicated LVDS aux. LVDS aux. LVDS/TTL aux. output input signals input output Type of signal VSYNC 0 1 in+ 1 out 1 1 in+ 1 out 2 1 in+ 1 out 3 1 in+...
  • Page 81 Matrox Helios eD/XD acquisition section The board supports auxiliary multi-purpose input and output signals. Auxiliary Auxiliary signals input signals can be routed as trigger input (for example, to synchronize image acquisition with external events), quadrature input, field polarity, data valid, timer clock input, or user-defined signals (for example, to synchronize an application with a user-defined event).
  • Page 82 82 Chapter 4: Matrox Helios hardware reference To establish which pixels are active in a line (because the horizontal synchronization signal does not identify the blanking portion of the signal), the board can generate a data valid signal based on information specified in the DCF.
  • Page 83 Matrox Helios eD/XD acquisition section If using the trigger to start acquisition, the trigger signal’s pulse width must be greater than two pixels; if using the trigger to start the exposure timer, the trigger signal’s pulse width must be greater than two clock periods of the timer. To determine the timer period, take the inverse of the pixel or timer’s clock frequency,...

  • Page 84: Matrox Oasis

    Matrox Oasis is a high-density chip that combines a powerful processing core and a PCI-X controller. Matrox Oasis allows processing to be independent of the grab, so you can perform flexible, real-time operations. For example, you can double-buffer by alternating the grab between two destination buffers.

  • Page 85: Links Controller

    The links controller (LINX) is the router that manages all data movement inside and outside Matrox. The LINX can receive video data in stream format from an Oasis link port, and then write it to memory through the main memory controller.
  • Page 86 • Up to 64 video input data streams that have different destinations. • Two video output streams. Matrox Oasis can generate interrupts at the start and end of a video stream transfer, as well as at the end of a specific line within a frame.
  • Page 87 Pixel Accelerator The pixel accelerator (PA), integrated in the Matrox Oasis ASIC, is designed for calculation-intensive image preprocessing. It is very efficient at performing most neighborhood, point-to-point, and LUT mapping operations.
  • Page 88 88 Chapter 4: Matrox Helios hardware reference The PA can accept up to four source buffers and output to four destination buffers, allowing several operations to be performed at once in a single pass (for example, four images can be averaged in one pass).
  • Page 89 Matrox Oasis The PA has 64 processing elements (PEs) that work in parallel. Each PE has the following structure: SRC0 SRC1 SRC2 SRC3 8 x 8 8 x 8 8 x 8 8 x 8 Multipliers* MAC unit Coefficients SRC0...
  • Page 90 90 Chapter 4: Matrox Helios hardware reference To maximize efficiency on all image widths (so that all PEs are fully utilized), the PA can split the PE linear array into shorter segments, each responsible for a different horizontal strip (set of rows) of the source image. The segments can be a power of two in length, from 32 to 256 pixels.
  • Page 91 Matrox Oasis can also pass the original source pixel (the centre pixel of the neighborhood) to the ALU along with the accumulated results. Therefore, a maximum of five values can be transferred from the MAC unit to the ALU for each pixel.
  • Page 92 92 Chapter 4: Matrox Helios hardware reference For each pixel, up to five values (MAC results or point sources) can be transferred to the register file of the ALU, into the first five of the seven 40-bit registers. Registers that are not needed to hold MAC results or point sources can be used to accumulate results during a processing pass, and any of them can be used to hold intermediate values temporarily during a single sequence of instructions.

  • Page 93: Memory

    To communicate with the Host, Matrox Helios eCL, eA, and eD can transfer data using the Host’s PCIe bus. Matrox Helios XCL, XA, and XD can transfer data using either the Host’s PCI or PCI-X bus, depending on the slot used by the board.

  • Page 94: Watchdog Circuitry

    1. 5 V starting from revision 1 of the Matrox Helios PCB; revision 0 is only 3.3 V PCI tolerant.

  • Page 95: Flash Eeprom

    You can enable the Watchdog circuitry, set the Watchdog timer, and send a reset signal using the MIL-Lite MsysControl() function. Flash EEPROM Matrox Helios eCL/XCL, eA/XA, and eD/XD all have an 8-Mbyte flash EEPROM. It stores: • Board initialization parameters and board data.
  • Page 96 96 Chapter 4: Matrox Helios hardware reference...

  • Page 97: Appendix A: Glossary

    Appendix A: Glossary This appendix defines some of the specialized terms used in the Matrox Helios documentation.
  • Page 98 98 Appendix A: Glossary • ASIC Application-specific integrated circuit. A custom-made integrated circuit made to meet the requirements of a specific application by integrating several digital and/or analog functions into a single die. Integrating the functions into a single die results in a reduction in cost, board area, and power consumption, while improving performance when compared to an equivalent implementation using off-the-shelf components.
  • Page 99 • DDR SDRAM Double Data Rate Synchronous Dynamic Random Access Memory. A type of memory used for processing. SDRAM allows the Matrox Helios to access data as fast as possible, which is important for I/O-bound functions. • Digitizer Configuration Format See DCF.
  • Page 100 100 Appendix A: Glossary • Frame A single image grabbed from a video source. • Gain level The factor by which an analog input signal is scaled. The gain affects the brightness and contrast of the resulting image. • Grab To acquire an image from a video source.
  • Page 101 • LUT mapping Lookup table mapping. A point-to-point operation that uses a table to define a replacement value for each possible pixel value in an image. • LVDS Low-voltage differential signalling. LVDS offers a general-purpose, high bandwidth interface standard for serial and parallel data interfaces that require increased bandwidth at high speed, with low noise and power consumption.
  • Page 102 102 Appendix A: Glossary • UART Universal Asynchronous Receiver/Transmitter. A component that handles asynchronous communication through an RS-232 serial interface. • Vertical blanking period The portion of a video signal after the end of a frame and before the beginning of a new frame.

  • Page 103: Appendix B: Technical Information

    Appendix B: Technical information This appendix contains information that might be useful when installing your Matrox Helios board.

  • Page 104: Board Summary

    • PCIe or PCI/PCI-X short board. Matrox Helios eCL has a x4 PCIe connector; Matrox Helios XCL has a universal (3.3 V - 5 V) 64-bit board edge connector (5 V starting from revision 1 of the Matrox Helios PCB;...
  • Page 105 Over 5.0 Gbytes/sec of memory bandwidth. • Six TTL configurable auxiliary I/Os (trigger, field polarity, timer clock, or user input, or exposure or user output). See Matrox Helios hardware reference for supported configurations. • Four LVDS configurable auxiliary inputs (trigger, field polarity, timer clock, synchronization, or user input).

  • Page 106: Technical Features Of Matrox Helios Ea/Xa

    Note that EEPROM is limited to 10000 write cycles. ❖ • Supports a x4 PCIe Host interface for Matrox Helios eCL; supports a 64-bit 66/100/133 MHz 3.3 V PCI-X (or a 64-bit 33/66 MHz 3.3 V or 5 V conventional PCI) Host interface for Matrox Helios XCL.
  • Page 107 Over 5.0 Gbytes/sec of memory bandwidth. • Eight TTL/LVDS configurable auxiliary inputs (trigger, field polarity, data valid, timer clock, synchronization, and/or user input). See Matrox Helios hardware reference for supported configurations. • Eight TTL/LVDS configurable auxiliary outputs (exposure, synchronization, or user output).

  • Page 108: Technical Features Of Matrox Helios Ed/Xd

    Note that EEPROM is limited to 10000 write cycles. ❖ • Supports a x4 PCIe Host interface for Matrox Helios eA; supports a 64-bit 66/100/133 MHz 3.3 V PCI-X (or a 64-bit 33/66 MHz 3.3 V or 5 V conventional PCI) Host interface.
  • Page 109 Over 5.0 Gbytes/sec of memory bandwidth. • Eight LVDS/RS-422 configurable auxiliary inputs (trigger, field polarity, data valid, timer clock, and/or user input). All can be TTL. See Matrox Helios hardware reference for supported configurations. • Internal video generator for diagnostics.

  • Page 110: Timing Specification

    110 Appendix B: Technical information Timing specification The following tables list the setup time for input signals for the Matrox Helios boards. Setup time for Camera Link Helios eCL/XCL Input signals in LVDS format 7.9 ns Input signal in TTL format 9.1 ns...

  • Page 111: Electrical Specifications

    Electrical specifications Electrical specifications Matrox Helios eCL (applies to PCB# Y7249-00)/XCL (applies to PCB# Y7108-03) Operating voltage and Typical: 3.3 V, 4.24 =14.0 W current (eCL) Typical: 12 V, 0.33 A = 4.0 W Total (typical): 18.0 W Operating voltage and Typical: 3.3 V, 1.97 A = 6.5 W...
  • Page 112 112 Appendix B: Technical information Matrox Helios eA (applies to Y7259-00)/XA (applies to Y7157-03) Operating voltage and Typical: 3.3 V, 3.31 A = 10.92 W current (eA) Typical: 12 V, 0.59 A = 7.08 W Total (typical) = 18.0 W Operating voltage and Typical: 3.3 V, 2 A...
  • Page 113 Electrical specifications Matrox Helios eA (applies to Y7259-00)/XA (applies to Y7157-03) Input signals in On the analog video input (DVI) connectors, for all TTL input signals, except for TTL auxiliary signals that can be TTL format configured for trigger input: •...
  • Page 114 114 Appendix B: Technical information Matrox Helios eD (applies to Y7284-00)/XD (applies to Y7183-01) Operating voltage and Typical: 3.3 V, 3.31 A = 10.92 W current (eD) Typical: 12 V, 0.59 A = 7.08 W Total (typical) = 18.0 W Operating voltage and Typical: 3.3 V, 0.00 A = 0.00 W...
  • Page 115 Electrical specifications Matrox Helios eD (applies to Y7284-00)/XD (applies to Y7183-01) Opto-coupled 511 Ohm series termination. input signals Input current: • low: 250 μA (max). • high: 5 mA (min) (6.3 mA recommended) to 15 mA (max) (10 mA recommended).

  • Page 116: Dimensions And Environmental Specifications

    - Ventilation requirements: 50 LFM (linear feet per minute) over board(s). • Matrox Helios eA/XA and eD/XD: - Dimensions: 31.20 L x 10.7 H x 1.73 W cm (12.283" x 4.2" x 0.68") from bottom edge of goldfinger to top edge of board.

  • Page 117: Connectors On Matrox Helios Ecl/Xcl

    Connectors on Matrox Helios eCL/XCL Connectors on Matrox Helios eCL/XCL The Matrox Helios eCL/XCL board has several interface connectors. On its bracket, there are two Camera Link video input connectors. On the top edge of the board, there is an internal auxiliary I/O connector and a system reset...

  • Page 118: Camera Link Video Input Connectors

    118 Appendix B: Technical information Camera Link video input connectors The two Camera Link video input connectors are 26-pin high-density mini D ribbon (MDR) connectors. They are used to receive video input, timing, and synchronization signals and transmit/receive communication signals between the video source and the frame grabber.
  • Page 119 For the single-Full version, connector #0 has the same pinout as the one in the previous table. For connector #1, the pinout is listed in the following table. You can only attach one video source to these connectors (or two RGB genlocked video sources); see Matrox Helios hardware reference for more details. Signal Description...

  • Page 120: External Auxiliary I/O Connector 0

    120 Appendix B: Technical information External auxiliary I/O connector 0 External auxiliary I/O connector 0 is a high-density DB-44 female connector, located on the bracket of the cable adapter board. It is used to transmit timing and synchronization signals, and transmit/receive auxiliary signals. It interfaces with the 50-pin internal auxiliary I/O connector on the board, making the I/O signals accessible outside the computer enclosure.
  • Page 121 Connectors on Matrox Helios eCL/XCL Signal Description P0_LVDS_CLK_OUT+ Clock output for acq. path 0 (positive). LVDS_AUX_IN1+ LVDS auxiliary input 1 for an unspecified acq. path (positive). Signals only supported for acq. path 0: user input 11. Signals only supported for acq. path 1: trigger input 1, user input 6, timer clock input, or quadrature input bit 1.
  • Page 122 122 Appendix B: Technical information Signal Description P0_LVDS_CLK_OUT- Clock output for acq. path 0 (negative). See pin 11 for more information. LVDS_AUX_IN1- LVDS auxiliary input 1 for an unspecified acq. path (negative). See pin 12 for more information. Ground. Ground. LVDS_AUX_IN0- LVDS auxiliary input 0 for an unspecified acq.

  • Page 123: External Auxiliary I/O Connector 1

    Connectors on Matrox Helios eCL/XCL To build your own cable, you can purchase the following parts: Manufacturer: NorComp, Inc. Connector: 180-044-102-001 Backshell: 970-025-010-011 These parts can be purchased from third parties such as Digi-Key Corporation (www.digikey.com). External auxiliary I/O connector 1 External auxiliary I/O connector 1 is a standard DB-9 female connector, located on the bracket of the cable adapter board.

  • Page 124: Internal Auxiliary I/O Connector

    124 Appendix B: Technical information Signal Description Ground. P0_OPTO_AUX_IN0+ Opto-isolated auxiliary input 0 for acq. path 0 (positive). Supported signals: trigger input 0, user input 0, field input. P0_LVDS_AUX_IN0+ LVDS auxiliary input 0 for acq. path 0 (positive). Supported signals: trigger input 0, user input 5, field input, or quadrature input bit 0.
  • Page 125 Connectors on Matrox Helios eCL/XCL Signal Description Signal Description P0_LVDS_HSYNC_OUT+ HSYNC output for acq. path P0_LVDS_HSYNC_OUT- HSYNC output for acq. path 0 0 (positive). (negative). Ground. P1_LVDS_HSYNC_OUT- HSYNC output for acq. path 1 (negative). P1_LVDS_HSYNC_OUT+ HSYNC output for acq. path Ground.

  • Page 126: System Reset Connector

    Watchdog circuitry of Matrox Helios detects abnormal Host inactivity. The system reset connector’s pin assignment is as follows. Note that pin 1 is denoted with the triangular etching in the image.

  • Page 127: Connectors On Matrox Helios Ea/Xa

    65039-035 (2 positions) Connectors on Matrox Helios eA/XA The Matrox Helios eA/XA board has several interface connectors. On its bracket, there are two analog video input connectors (DVI type). On the top edge of the board, there is an internal auxiliary I/O connector and a system reset connector.

  • Page 128: Analog Video Input Connectors

    (DVI-I to DVI-I or DVI-A to DVI-A cable) if the display board encodes the synchronization signals on the video data (sync on green). Otherwise, you must use the Matrox DVI-TO-8BNC/O cable or a custom cable that re-routes the synchronization signals to the appropriate pins.
  • Page 129 Connectors on Matrox Helios eA/XA Signal Description Signal Description P1_TTL_AUX(EXP)_OUT TTL auxiliary output for acq. path 1. P1_TTL_AUX(TRIG)_IN TTL auxiliary input for acq. path 1. Supported signals: exposure output 0 (main purpose) or user output 2. Supported signals: trigger input 0 (main purpose), field input, or user input 0.
  • Page 130 130 Appendix B: Technical information Signal Description Signal Description P2_LVDS/TTL_VSYNC_IO- VSYNC input/output for acq. path 2 P2_LVDS/TTL_CLK_IO- Clock input/output for (negative). acq. path 2 (negative). P2_LVDS/TTL_VSYNC_IO+ VSYNC input/output for acq. path 2 P2_LVDS/TTL_CLK_IO+ Clock input/output for (positive). acq. path 2 (positive). P3_TTL_AUX(EXP)_OUT TTL auxiliary output for acq.

  • Page 131: External Auxiliary I/O Connector 0

    Connectors on Matrox Helios eA/XA External auxiliary I/O connector 0 External auxiliary I/O connector 0 is a high-density DB-44 female connector, located on the bracket of the LVDS cable adapter board. This connector interfaces with the 50-pin internal auxiliary I/O connector on the board. This connector is used to transmit/receive auxiliary signals;...
  • Page 132 132 Appendix B: Technical information Signal Description LVDS/TTL_AUX_IN5- Auxiliary input 5 for an unspecified acq. path (negative). See pin 6 for more information. LVDS/TTL_AUX_IN5+ Auxiliary input 5 for an unspecified acq. path (positive). Signals only supported for acq. path 0 and 1: user input 7. Signals only supported for acq.
  • Page 133 Connectors on Matrox Helios eA/XA Signal Description P3_LVDS/TTL_AUX_OUT0- Auxiliary output 0 for acq. path 3 (negative). See pin 33 for more information. Ground. P2_LVDS/TTL_AUX_OUT1+ Auxiliary output 1 for acq. path 2 (positive). Supported signals: user output 1, exposure output 1, or VSYNC output.
  • Page 134 134 Appendix B: Technical information Signal Description LVDS/TTL_AUX_IN0+ Auxiliary input 0 for an unspecified acq. path (positive). Signals only supported for acq. path 0: user input 2, field, data valid, CSYNC, HSYNC input, or quadrature input bit 0. Signals only supported for acq. path 1, 2, and 3: user input 4. Signals supported for any acq.

  • Page 135: External Auxiliary I/O Connector 1

    Connectors on Matrox Helios eA/XA External auxiliary I/O connector 1 External auxiliary I/O connector 1 is a standard DB-9 female connector, located on the bracket of the LVDS cable adapter board. It is used to receive opto-isolated auxiliary input signals. It interfaces with the 50-pin internal auxiliary I/O connector on the board, making the auxiliary signals accessible outside the computer enclosure.

  • Page 136: Internal Auxiliary I/O Connector

    136 Appendix B: Technical information To build your own cable, you can purchase the following parts: Manufacturer: NorComp, Inc. Connector: 172-E09-102-031 Backshell: 970-009-010-011 These parts can be purchased from third parties such as Digi-Key Corporation (www.digikey.com). Internal auxiliary I/O connector The internal auxiliary I/O connector is a 50-pin low-profile IDC connector.
  • Page 137 Connectors on Matrox Helios eA/XA The pinout for this connector is as follows. Refer to the description of the external auxiliary I/O connectors to establish if an auxiliary signal is specific to an independent acquisition path and the type of signals that can be routed onto it.

  • Page 138: System Reset Connector

    Watchdog circuitry of Matrox Helios detects abnormal Host inactivity. The system reset connector’s pin assignment is as follows. Note that pin 1 is denoted with the triangular etching in the image.

  • Page 139: Connectors On Matrox Helios Ed/Xd

    65039-035 (2 positions) Connectors on Matrox Helios eD/XD Matrox Helios eD/XD has several interface connectors. On its bracket, there is a digital video input connector (for acquisition paths 0 and 1). On its top edge, there is an internal digital video input connector (for acquisition paths 2 and 3), an internal auxiliary I/O connector, and a system reset connector.

  • Page 140: Digital Video Input Connectors

    140 Appendix B: Technical information Digital video input connectors The two digital connectors are 100-pin low-profile IDC female connectors (receptacles). They are used to receive video input signals and transmit/receive timing, synchronization, and communication signals between the video source and the frame grabber. Connector 0 has the following pinout: Signal Description...
  • Page 141 Connectors on Matrox Helios eD/XD Signal Description P0_LVDS_DATA_IN9- Data bit 9 for acq. path 0, in LVDS format (negative). P0_LVDS_DATA_IN10+ Data bit 10 for acq. path 0, in LVDS format (positive). P0_LVDS_DATA_IN10- Data bit 10 for acq. path 0, in LVDS format (negative).
  • Page 142 142 Appendix B: Technical information Signal Description P0_LVDS/TTL_AUX(EXP)_OUT2- Negative component when LVDS signal arriving on LVDS/TTL auxiliary output 2 for acq. path 0. See pin 45 for more information. P0_LVDS/TTL_AUX(EXP)_OUT3+ LVDS/TTL auxiliary output 3 for acq. path 0 (positive). Supported signals: exposure output 1 (main purpose) or user output 4. P0_LVDS/TTL_AUX(EXP)_OUT3- Negative component when LVDS signal arriving on LVDS/TTL auxiliary output 3 for acq.
  • Page 143 Connectors on Matrox Helios eD/XD Signal Description P1_LVDS_DATA_IN12- Data bit 12 for acq. path 1, in LVDS format (negative). P1_LVDS_DATA_IN13+ Data bit 13 for acq. path 1, in LVDS format (positive). P1_LVDS_DATA_IN13- Data bit 13 for acq. path 1, in LVDS format (negative).
  • Page 144 144 Appendix B: Technical information Signal Description P1_TTL_AUX(TRIG)_IO TTL auxiliary input/output for acq. path 1. Supported signals: trigger input 1 (main purpose), user input 3, or user output 5. Ground Connector 1 has the following pinout: Signal Description P2_LVDS_DATA_IN0+ Data bit 0 for acq. path 2, in LVDS format (positive). P2_LVDS_DATA_IN0- Data bit 0 for acq.
  • Page 145 Connectors on Matrox Helios eD/XD Signal Description P2_LVDS_DATA_IN13- Data bit 13 for acq. path 2, in LVDS format (negative). P2_LVDS_DATA_IN14+ Data bit 14 for acq. path 2, in LVDS format (positive). P2_LVDS_DATA_IN14- Data bit 14 for acq. path 2, in LVDS format (negative).
  • Page 146 146 Appendix B: Technical information Signal Description Ground P3_LVDS_DATA_IN0+ Data bit 0 for acq. path 3, in LVDS format (positive). P3_LVDS_DATA_IN0- Data bit 0 for acq. path 3, in LVDS format (negative). P3_LVDS_DATA_IN1+ Data bit 1 for acq. path 3, in LVDS format (positive). P3_LVDS_DATA_IN1- Data bit 1 for acq.
  • Page 147 Supported signals: trigger input 1 (main purpose), user input 3, or user output 5. Ground You can use the open-ended Matrox DBHD100-TO-OPEN cable to interface with this connector. This cable has a 100-pin low-profile IDC connector at one end, and open-ended wires at the other end.

  • Page 148: External Auxiliary I/O Connector 0

    148 Appendix B: Technical information If building your own cable, you can purchase the following part: Manufacturer: ACON Advanced-Connectek Inc. Connector and shell: HBP50-1AK3202 Ensure that the cable is a twisted-pair type cable, twisted along signal pairs. External auxiliary I/O connector 0 External auxiliary I/O connector 0 is a high-density DB-44 female connector, located on the bracket of the cable adapter board.
  • Page 149 Connectors on Matrox Helios eD/XD Signal Description LVDS/TTL_AUX(TRIG)_IN1+ LVDS/TTL auxiliary input 1 for an unspecified acq. path (positive). Signals only supported for acq. path 0: field polarity input, timer clock input, user input 2, or quadrature input bit 1. Signals only supported for acq. path 1, 2, and 3: user input 7.
  • Page 150 150 Appendix B: Technical information Signal Description Ground LVDS/TTL_AUX(TRIG)_IN2- Negative component when LVDS signal arriving on LVDS/TTL auxiliary input 2 for an unspecified acq. path. See pin 7 for more information. P3_OPTO_AUX(TRIG)_IN0+ Opto-isolated auxiliary input for acq. path 3 (positive). Supported signals: trigger input 0 (main purpose) or user input 4.
  • Page 151 Connectors on Matrox Helios eD/XD Signal Description LVDS/TTL_AUX(TRIG)_IN6- Negative component when LVDS signal arriving on LVDS/TTL auxiliary input 6 for an unspecified acq. path (negative). See pin 39 for more information. LVDS/TTL_AUX(TRIG)_IN6+ LVDS/TTL auxiliary input 6 for an unspecified acq. path (positive).

  • Page 152: External Auxiliary I/O Connector 1

    152 Appendix B: Technical information External auxiliary I/O connector 1 External auxiliary I/O connector 1 is a standard DB-9 female connector, located on the bracket of the cable adapter board. This connector is used to receive opto-isolated auxiliary signals; these signals can be used to route trigger or user-defined signals.

  • Page 153: Internal Auxiliary I/O Connector

    Connectors on Matrox Helios eD/XD To build your own cable, you can purchase the following parts: Manufacturer: NorComp, Inc. Connector: 172-E09-102-031 Backshell: 970-009-010-011 These parts can be purchased from third parties such as Digi-Key Corporation (www.digikey.com). Internal auxiliary I/O connector The internal auxiliary I/O connector is a 50-pin low-profile IDC connector.
  • Page 154 154 Appendix B: Technical information Signal Description Signal Description P0_OPTO_AUX(TRIG)_IN1+ Opto-isolated auxiliary input P0_OPTO_AUX(TRIG)_IN1- Opto-isolated auxiliary input (main purpose is trigger 1) (main purpose is trigger 1) for acq. path 0 (positive) for acq. path 0 (negative) LVDS/TTL_AUX(TRIG)_IN0+ LVDS/TTL auxiliary input 0 LVDS/TTL_AUX(TRIG)_IN0- Negative component when (main purpose is trigger 2)
  • Page 155 Connectors on Matrox Helios eD/XD Signal Description Signal Description P2_RS232_RxD RS-232 serial input to acq. P2_RS232_TxD RS-232 serial output from path 2 of frame grabber acq. path 2 (UART) to video (UART). source. P2_OPTO_AUX(TRIG)_IN0+ Opto-isolated auxiliary input P2_OPTO_AUX(TRIG)_IN0- Opto-isolated auxiliary input...

  • Page 156: System Reset Connector

    Matrox Helios eD/XD has a system reset connector. The system reset connector is a standard, 0.1" spacing, 8-pin male connector, used to reset the motherboard if the reset button is pressed or the Watchdog circuitry of Matrox Helios detects abnormal Host inactivity. The system reset connector’s pin assignment is as follows.

  • Page 157: Ventilation Requirements

    Ventilation requirements Ventilation requirements This section describes how to determine the ventilation requirements for a Matrox Helios system enclosure. Ventilation moderates the steady-state internal temperature rise in the enclosure; the sum of the temperature rise and the room operating temperature should not exceed the maximum operating temperature supported by Matrox Helios.

  • Page 158: Fan Example

    158 Appendix B: Technical information If the enclosure has smaller openings than the fan area, you must add this resistance to the enclosure pressure. If you have a 80 mm x 80 mm fan and only the equivalent of a 60 mm x 60 mm enclosure opening, you have an area ratio of (60 x 60)/(80 x 80) =3600/6400 = 0.5625.

  • Page 159: Optimal Placement

    Ventilation requirements In this case, the opening of the intake and exhaust has the same area as that of the fan (14400 mm ). This means that you only have to deal with the turbulent pressure. A single fan at 3.75 mm of H O of pressure results in about 0.66 m /min of air flow.
  • Page 160 160 Appendix B: Technical information...

  • Page 161: Appendix C: Listing Of Matrox Helios Boards

    Appendix C: Listing of Matrox Helios boards This appendix lists specific versions and revisions of Matrox Helios.

  • Page 162: Revisions Of Matrox Helios

    162 Appendix C: Listing of Matrox Helios boards Revisions of Matrox Helios PCB Version Board Description Matrox Helios eCL Y7249-00 rev. A • First shipping version. • Oasis and DDR SDRAM running at 167 MHz. • RoHS-compliant version. • Supports up to 1 Gbyte of memory.
  • Page 163 Revisions of Matrox Helios Board PCB Version Description Matrox Helios XA 7157-00 rev. B • First shipping version. • 3.3 V PCI tolerant. 7157-01 rev. A • 3.3 V / 5 V PCI tolerant. 7157-02 rev. A • Oasis and DDR SDRAM running at 167 MHz.
  • Page 164 164 Appendix C: Listing of Matrox Helios boards...

  • Page 165: Index

    Index Camera Link video input connectors 118 Camera Link, supported configurations 10 channel switching, Matrox Helios eA/XA 62 clock Matrox Helios eA/XA 66 A/D converters, Matrox Helios eA/XA 64 COM port 16 AC coupling, Matrox Helios eA/XA 62 composite synchronization signals 65...
  • Page 166 Matrox Helios eCL/XCL 57 LINX Matrox Helios eD/XD 83 see links controller external auxiliary I/O connector 0 120 low-pass filters, Matrox Helios eA/XA 64 external auxiliary I/O connector 1 123 LUTs defined 101 Matrox Helios eA/XA 65 Matrox Helios eCL/XCL 52...
  • Page 167 55 Nyquist frequency 66 camera control output signals 55 ChannelLink receivers 51 communication 53 connectors 117 offset controller, Matrox Helios eA/XA 63 demultiplexer 52 dual-Base 49 exposure timers 57 LUTs 52 see pixel accelerator, Matrox Oasis...
  • Page 168 102 RS-232 compatible serial interfaces 16 vertical synchronization defined 102 vertical synchronization signals 65 sampling rates doubled, Matrox Helios eA/XA 61 video generator 16 sampling rates, Matrox Helios eA/XA 60 video sources 14 sampling rates, Matrox Helios eD/XD 75...
  • Page 169 Regulatory compliance for Matrox Helios eCL, eA, eD, and XA FCC Compliance Statement Warning Changes or modifications to these units not expressly approved by the party responsible for the compliance could void the user's authority to operate this equipment. The use of shielded cables for connections of these devices to other peripherals is required to meet the regulatory requirements.
  • Page 170 Matrox Helios XCL and XD FCC Compliance Statement Remark for the Matrox hardware products supported by this guide These devices have been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
  • Page 171 Telephone: (514) 822-6000 (x2026) • Attention: Conformity Group Declaration The Matrox hardware products supported by this guide comply with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) these devices may not cause harmful interference, and (2) these devices must accept any interference received, including interference that may cause undesired operation.
  • Page 172 (Français) Informations aux utilisateurs Européens – Déclaration de conformité Remarque sur les produits matériels Matrox couverts par ce guide Ces unités sont conformes à la directive communautaire 89/336/EEC pour les unités numériques de classe B. Les tests effectués ont prouvé qu’elles sont conformes aux normes EN55022/CISPR22 et EN55024/CISPR24.
  • Page 173 Bitte wenden Sie sich an dem Matrox-Website (www.matrox.com/environment/weee) für Recycling Informationen. (Italiano) Informazioni per gli utenti europei – Direttiva sui rifiuti di apparecchiature elettriche ed elettroniche (RAEE) Si prega di riferirsi al sito Web Matrox (www.matrox.com/environment/weee) per le informazioni di riciclaggio.
  • Page 174 Limited Warranty Refer to the warranty statement that came with your product.

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