Technical Features Of Matrox Helios Ed/Xd - Matrox Helios Series Installation And Hardware Reference

108 Appendix B: Technical information
• 8 Mbytes flash EEPROM.
Note that EEPROM is limited to 10000 write cycles.
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• Supports a x4 PCIe Host interface for Matrox Helios eA; supports a 64-bit
66/100/133 MHz 3.3 V PCI-X (or a 64-bit 33/66 MHz 3.3 V or 5 V
conventional PCI) Host interface.
• Integrated Watchdog circuitry for automatically recovering from application or
system failure.
• Supports an external rotary encoder with quadrature output.

Technical features of Matrox Helios eD/XD

• PCIe long board with a x4 PCIe connector, or a PCI/PCI-X long board with a
universal (3.3 V - 5 V) 64-bit board edge connector.
• Four independent acquisition paths. Each acquisition path supports the following:
- 16-bit wide LVDS or RS-422 interface.
- Acquisition rates up to 60 MHz for LVDS and 32 MHz for RS-422.
- LVDS/RS-422 vsync/auxiliary, hsync, and clock inputs.
- Five LVDS/RS-422 configurable auxiliary outputs (exposure, synchronization,
clock, or user output). Four of these outputs can be TTL.
- Two opto-isolated configurable auxiliary inputs (trigger or user input).
- One TTL configurable auxiliary I/O (trigger input 1, user input, or user
output).
- One TTL configurable auxiliary output (exposure or user output).
- Serial communication port.