Table of Contents
Advertisement
Table 32: Pin Definition of IPQ Status and Err Fatal Interface
Pin Name
COEX_RXD
COEX_TXD
GPIO_32
The following figure shows a reference design of the module with IPQ GPIOs.
Module
NOTE
1. IPQ indicates an application processor, and IPQ5018 is used by default here.
2. For details, contact Quectel Technical Support.
4.14. MAIN_RI
AT+QCFG= "risignaltype", "physical" can be used to configure MAIN_RI behavior. No matter on which
port a URC is presented, the URC will trigger the behavior of MAIN_RI pin.
NOTE
The URC can be outputted via UART, USB AT port and USB modem port, which can be set via
AT+QURCCFG. The default port is USB AT port.
In addition, MAIN_RI behaviors can be configured flexibly. The default behavior of the MAIN_RI is shown
as below.
RG520N-AT_Hardware_Design
Pin No.
Multiplexed Function
65
SDX2AP_E911
67
SDX2AP_STATUS
98
AP2SDX_STATUS
COEX_RXD
COEX_TXD
GPIO_32
Figure 35: Module with IPQ GPIO Application
I/O
Description
DO
Module to AP err fatal
DO
Module to AP status
DI
AP to module status
IPQ 5018
SDX2AP_E911
SDX2AP_STATUS
AP2SDX_STATUS
5G Module Series
68 / 109
Advertisement
Table of Contents
