Usb_Boot - Quectel RG520N-AT Hardware Design

⚫
For USB 2.0 signal traces, the trace length should be less than 250 mm, and the length matching of
each differential data pair (DP/DM) should be less than 2 mm (14 ps). For USB 3.1 signal traces,
length matching of each differential data pair (Tx/Rx) should be less than 0.7 mm (5 ps), while the
matching between Tx and Rx should be less than 10 mm.
⚫
Do not route signal traces under crystals, oscillators, magnetic devices, PCIe and RF signal traces. It
is important to route the USB differential traces in inner-layer of the PCB, and surround the traces
with ground on that layer and with ground planes above and below.
⚫
Junction capacitance of the ESD protection components might cause influences on USB data traces,
so pay attention to the selection of the components. Typically, the stray capacitance should be less
than 1.0 pF for USB 2.0, and less than 0.15 pF for USB 3.1.
⚫
Keep ESD protection components as close to the USB connector as possible.
For more details about the USB specifications, please visit http://www.usb.org/home.
Table 13: USB Trace Length in the Module
Pin No. Pin Name
83 USB_DP
85 USB_DM
91 USB_SS_TX_P
89 USB_SS_TX_M
88 USB_SS_RX_P
86 USB_SS_RX_M
NOTE
Both USB 3.1 interface and PCIe interface support data transmission, and USB 3.1 interface is used by
default. If you want to use PCIe interface for communication, set it with AT+QCFG via USB or main
UART. For more details about AT command, see document [3].

4.2. USB_BOOT

The module provides a USB_BOOT pin. You can pull up USB_BOOT to VDD_EXT before turning on the
module, thus the module will enter emergency download mode after being turned on. In this mode, the
module supports firmware upgrade over USB interface.
RG520N-AT_Hardware_Design
Length (mm)
31.10
31.15
32.90
33.02
30.90
30.73
5G Module Series
Length Difference (P-M) (mm)
-0.05
-0.12
-0.17
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