Quectel RG520N-AT Hardware Design page 47

USB_SS_TX_P
USB_SS_TX_M
USB_SS_RX_P
USB_SS_RX_M
Test points must be reserved for debugging and firmware upgrading in your designs. The following figure
shows the reference circuit of USB interface.
Module
USB_VBUS
USB_DM
USB_SS_TX_P
USB_SS_TX_M
USB_SS_RX_P
USB_SS_RX_M
To ensure the signal integrity of USB data traces, you must place R1, R2, R3, R4, C1 and C2 close to the
module, C3 and C4 close to the host, and keep these resistors close to each other. Keep the extra stubs
of trace as short as possible.
The following principles should be complied with when designing the USB interface, to meet USB
specifications.
⚫
It is important to route the USB signal traces as differential pairs with ground surrounded. The
impedance of USB 2.0 differential trace is 90 Ω. The impedance of USB 3.1 differential trace is 85 Ω.
RG520N-AT_Hardware_Design
91 AO
89 AO
88 AI
86 AI
Minimize these stubs
VDD
USB_DP
Close to Module
C1 220 nF
C2 220 nF
GND
Figure 18: Reference Circuit of USB Application
USB 3.1 SuperSpeed
transmit (+)
USB 3.1 SuperSpeed
transmit (-)
USB 3.1 SuperSpeed
receive (+)
USB 3.1 SuperSpeed
receive (-)
Test Points
R3 NM_0R
NM_0R
R4
TVS Array
R1
0R
R2 0R
220 nF
220 nF
5G Module Series
Requires differential
impedance of 85 Ω.
USB 3.1 Gen 2 compliant.
Host
USB_DM
USB_DP
USB_SS_RX_P
USB_SS_RX_M
C3
USB_SS_TX_P
C4
USB_SS_TX_M
GND
46 / 109