Quectel RG520N-AT Hardware Design page 44

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Table 10: Pin Definition of RESET_N
Pin Name
RESET_N
The recommended circuit is the same as the PWRKEY control circuit. An open-drain/open-collector driver
or button can be used to control the RESET_N.
GPIO
MCU
Figure 15: Reference Circuit of RESET_N with Driving Circuit
RG520N-AT_Hardware_Design
Pin No.
I/O
8
DI
≥ 500 ms
Reset pulse
Q1
S2
TVS
Close to S2
Figure 16: Reference Circuit of RESET_N with a Button
Description
Resets the module
4.7K
47K
R1
1K
Reset pulse
5G Module Series
Comment
Internally pulled up to 1.8 V
with a 40 kΩ resistor.
RESET_N
Module
RESET_N
Module
43 / 109

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