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SDIO_VDD
SDIO_DATA0
SDIO_DATA1
SDIO_DATA2
SDIO_DATA3
SDIO_CMD
SDIO_CLK
SDIO_PWR_EN
SDIO_PWR_
VSET
SDIO_DET
Antenna Interfaces
Pin Name
ANT0
ANT1
ANT2
RG520N-AT_Hardware_Design
SDIO power
60
PI
supply
49
DIO
SDIO data bit 0
50
DIO
SDIO data bit 1
51
DIO
SDIO data bit 2
52
DIO
SDIO data bit 3
48
DIO
SDIO command
47
DO
SDIO clock
SDIO power
53
DO
supply enable
SDIO power
56
DO
domain set
55
DI
SD card detect
Pin No.
I/O
Description
Antenna 0 interface:
-
130
AIO
-
-
Antenna 1 interface:
-
-
157
AIO
-
Antenna 2 interface:
-
166
AIO
-
Characteristics
The power
domain of SDIO
pins depends on
SDIO_VDD.
1.8 V
5G NR: n77 TRX0
LTE: LMB_TRX0 & HB_DRX
Refarmed: LMB_TRX0 &
HB_TRX1
5G NR: n77 DRX MIMO
LTE: LMB_PRX MIMO & HB_DRX
MIMO
Refarmed: LMB_PRX MIMO &
HB_DRX MIMO
5G NR: n77 PRX MIMO
LTE: LMB_DRX MIMO & HB_PRX
MIMO
5G Module Series
1.8/2.95 V
configurable input.
If unused, connect it
to VDD_EXT.
If unused, keep
them open.
Pull it up to
VDD_EXT with a
470 kΩ resistor.
If unused, keep it
open.
Comment
50 Ω impedance.
27 / 109
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