Quectel RG520N-AT Hardware Design page 58

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VDD_1V8
MAIN_RI
MAIN_DCD
MAIN_DTR
MAIN_TXD
MAIN_RXD
Figure 28: Reference Circuit with a Voltage-level Translator
Another example with transistor circuit is shown as below. For the design of circuits shown in dotted lines,
see that shown in solid lines, but pay attention to the direction of connection.
Module
MAIN_RXD
MAIN_TXD
MAIN_DTR
MAIN_RI
MAIN_DCD
NOTE
1. Transistor solution is not suitable for applications with baud rates exceeding 460 kbps.
2. Other baud rates of the main UART are under development.
3. Please note that the module's BT_CTS is connected to the peripheral's CTS, and the module's
BT_RTS is connected to the peripheral's RTS.
RG520N-AT_Hardware_Design
VCCA
0.1 μF
OE
A1
A2
A3
A4
A5
51K
A6
VDD_1V8
10K
VDD_1V8
GND
Figure 29: Reference Circuit with Transistor Circuit
VCCB
GND
B1
B2
Translator
B3
B4
B5
B6
4.7 K
VDD_1V8
1 nF
1 nF
10K
VDD_MCU
4.7K
5G Module Series
VDD_MCU
0.1 μF
RI_MCU
DCD_MCU
DTR_MCU
TXD_MCU
RXD_MCU
51K
MCU/ARM
TXD
RXD
GPIO
EINT
GPIO
GND
57 / 109

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