Status; Behaviors Of Main_Ri - Quectel BG772A-GL Hardware Design

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3.14. STATUS

The STATUS pin is used to indicate the operation status of BG772A-GL. It outputs high level when the
module powers on.
The following table describes the pin definition of STATUS.
Table 19: Pin Definition of STATUS
Pin Name
Pin No.
STATUS
78
The following figure shows a reference circuit of STATUS.

3.15. Behaviors of MAIN_RI*

AT+QCFG="risignaltype","physical" can be used to configure MAIN_RI behavior. No matter on which
port URC is presented, URC will trigger the behavior of MAIN_RI pin.
The default behaviors of MAIN_RI are shown as below.
Default
Table 20:
Behaviors of
State
Idle
URC
BG772A-GL_Hardware_Design
I/O
Description
DO/PD
Indicate the module's operation status
Figure 21: Reference Design of STATUS
MAIN_RI
Response
MAIN_RI keeps in high level.
MAIN_RI outputs 120 ms low pulse when new URC returns.
LPWA Module Series
BG772A-GL Hardware Design
Comment
1.8 V power domain
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