Xilinx ZC702 User Manual page 59

For the zynq-7000 xc7z020 all programmable soc
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internally OR's these PG conditions together and drives an output PG pin high only if all
active rail PG states are "good". The On and Off Delay and rise and fall times are relative to
when the board power on-off slide switch SW12 is turned on and off.
Table 1-31
defines the voltage and current values for each power rail controlled by the
UCD9248 PMBus controller at address 52 (U32).
Table 1-31: Power Rail Specifications for UCD9248 PMBus Controller at Address 52
Rail
Rail
Rail Name
Number
Name
1
Rail #1
VCCINT
2
Rail #2
VCCPINT
3
Rail #3
VCCAUX
4
Rail #4
VCCPAUX
Notes:
1. The values defined in these columns are the voltage, current, and temperature thresholds that causes the regulator to shut
down if the value is exceeded.
Table 1-32
defines the voltage and current values for each power rail controlled by the
UCD9248 PMBus controller at address 53 (U33).
Table 1-32: Power Rail Specifications for UCD9248 PMBus Controller at Address 53
Rail
Rail
Schematic
Number
Name
Rail Name
1
Rail #1
VADJ
2
Rail #2
VCC1V5
3
Rail #3
VCCMIO_PS
4
Rail #4
VCCBRAM
Notes:
1. The values defined in these columns are the voltage, current, and temperature thresholds that causes the regulator to shut
down if the value is exceeded.
ZC702 Board User Guide
UG850 (v1.3) June 4, 2014
1
0.9
0.85
0
1
0.9
0.85
0
1.8
1.62
1.53
0
1.8
1.62
1.53
0
2.5
2.25
2.125
0
1.5
1.35
1.275
0
1.8
1.62
1.53
0
1
0.9
0.85
0
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Feature Descriptions
Shutdown Threshold
5
10
1
1.15
5
10
1
1.15
5
5
1
2.07
5
5
1
2.07
Shutdown Threshold
5
1
1
2.875
5
0
1
1.725
5
5
1
2.07
5
10
1
1.15
Send Feedback
(1)
20
90
20
90
10.41
90
10.41
90
(1)
10.41
90
10.41
90
10.41
90
20
90
59

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