Board Layout - Xilinx ZC702 User Manual

Board Layout

Figure 1-2 shows the ZC702 board. Each numbered feature that is referenced in
is described in
Descriptions starting on
and might not reflect the current revision of the board.
The ZC702 board can be damaged by electrostatic discharge (ESD). Follow ESD prevention
CAUTION!
measures when handling the board.
X-Ref Target - Figure 1-2
Round callout references a component
00
on the front side of the board
27
5
31
20
13
ZC702 Board User Guide
UG850 (v1.3) June 4, 2014
Table 1-1 with a link to detailed information provided under
page 12. Note that the image in
24
26
29
3
18
8
23
7
14
9
10
21
11
6
Figure 1-2: ZC702 Board Component Locations
www.xilinx.com
Figure 1-2
Square callout references a component
00
on the back side of the board
24
17
18
19
1
25
2
22
12
4
Overview
Figure 1-2
Feature
is for reference only
30
25
15
16
28
UG850_c1_02_032013
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10