Xilinx ZC702 User Manual page 54

Table 1-29 shows the LPC connections between FMC2 (J4) and AP SoC U1.
Table 1-29: LPC Connections, FMC2 (J4) to AP SoC U1
FMC2
Net Name
J4 Pin
C2 NC
C3 NC
C6 NC
C7 NC
C10 FMC2_LPC_LA06_P
C11 FMC2_LPC_LA06_N
C14 FMC2_LPC_LA10_P
C15 FMC2_LPC_LA10_N
C18 FMC2_LPC_LA14_P
C19 FMC2_LPC_LA14_N
C22 FMC2_LPC_LA18_CC_P
C23 FMC2_LPC_LA18_CC_N
C26 FMC2_LPC_LA27_P
C27 FMC2_LPC_LA27_N
C30 FMC2_LPC_IIC_SCL
C31 FMC2_LPC_IIC_SDA
C34 GA0 = 0 = GND
C35 VCC12_P
C37 VCC12_P
C39 VCC3V3
G2 FMC2_LPC_CLK1_M2C_P
G3 FMC2_LPC_CLK1_M2C_N
G6 FMC2_LPC_LA00_CC_P
G7 FMC2_LPC_LA00_CC_N
G9 FMC2_LPC_LA03_P
ZC702 Board User Guide
UG850 (v1.3) June 4, 2014
XC7Z020 (U1)
J4 Pin
Pin
D1 PWRCTL1_VCC4A_PG
D4 NC
D5 NC
D8 FMC2_LPC_LA01_CC_P
U17 D9 FMC2_LPC_LA01_CC_N
V17 D11 FMC2_LPC_LA05_P
Y20 D12 FMC2_LPC_LA05_N
Y21 D14 FMC2_LPC_LA09_P
T22 D15 FMC2_LPC_LA09_N
U22 D17 FMC2_LPC_LA13_P
AA9 D18 FMC2_LPC_LA13_N
AA8 D20 FMC2_LPC_LA17_CC_P
AB2 D21 FMC2_LPC_LA17_CC_N
AB1 D23 FMC2_LPC_LA23_P
D24 FMC2_LPC_LA23_N
D26 FMC2_LPC_LA26_P
D27 FMC2_LPC_LA26_N
D29 FMC2_LPC_TCK_BUF
D30 FMC1_LPC_TDO_FMC2_LPC_TDI
D31 FMC2_LPC_TDO_FPGA_TDI
D32 VCC3V3
D33 FMC2_LPC_TMS_BUF
D34 NC
D35 GA0 = 0 = GND
D36 VCC3V3
D38 VCC3V3
D40 VCC3V3
H1 NC
H2 FMC2_LPC_PRSNT_M2C_B
Y19 H4 FMC2_LPC_CLK0_M2C_P
AA19 H5 FMC2_LPC_CLK0_M2C_N
AA16 H7 FMC2_LPC_LA02_P
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Feature Descriptions
XC7Z020 (U1)
Net Name
W16
Y16
AB19
AB20
U15
U16
V22
W22
AA7
AA6
V12
W12
U12
U11
Y18
AA18
V14
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