Data Reception In Master Mode - Epson S1C17W03 Technical Manual

14.4.3 Data Reception in Master Mode

A data receiving procedure in master mode and the I2C Ch.n operations are shown below. Figures 14.4.3.1 and
14.4.3.2 show an operation example and a flowchart, respectively.
Data receiving procedure
1. When receiving one-byte data, write 1 to the I2CnCTL.TXNACK bit.
2. Issue a START condition by setting the I2CnCTL.TXSTART bit to 1.
3. Wait for a transmit buffer empty interrupt (I2CnINTF.TBEIF bit = 1) or a START condition interrupt (I2C-
nINTF.STARTIF bit = 1).
Clear the I2CnINTF.STARTIF bit by writing 1 after the interrupt has occurred.
4. Write the 7-bit slave address to the I2CnTXD.TXD[7:1] bits and 1 that represents READ as the data transfer
direction to the I2CnTXD.TXD0 bit.
5. Wait for a receive buffer full interrupt (I2CnINTF.RBFIF bit = 1) generated when a one-byte reception has
completed or a NACK reception interrupt (I2CnINTF.NACKIF bit = 1) generated when a NACK is re-
ceived.
i. Go to Step 6 when a receive buffer full interrupt has occurred.
ii. Clear the I2CnINTF.NACKIF bit and issue a STOP condition by setting the I2CnCTL.TXSTOP bit to 1
when a NACK reception interrupt has occurred. Then go to Step 9 or Step 2 if making a retry.
6. Perform one of the operations below when the last or next-to-last data is received.
i. When the next-to-last data is received, write 1 to the I2CnCTL.TXNACK bit to send a NACK after the
last data is received, and then go to Step 7.
ii. When the last data is received, read the received data from the I2CnRXD register and set the I2CnCTL.
TXSTOP to 1 to generate a STOP condition. Then go to Step 9.
7. Read the received data from the I2CnRXD register.
8. Repeat Steps 5 to 7 until the end of data reception.
9. Wait for a STOP condition interrupt (I2CnINTF.STOPIF bit = 1).
Clear the I2CnINTF.STOPIF bit by writing 1 after the interrupt has occurred.
Data receiving operations
Generating a START condition
It is the same as the data transmission in master mode.
Sending slave address
It is the same as the data transmission in master mode. Note, however, that the I2CnTXD.TXD0 bit must be
set to 1 that represents READ as the data transfer direction to issue a request to the slave to send data.
Receiving data
After the slave address has been sent, the slave device sends an ACK and the first data. The I2C Ch.n sets
the I2CnINTF.RBFIF bit to 1 after the data reception has completed. Furthermore, the I2C Ch.n returns an
ACK. To return a NACK, such as for a response after the last data has been received, write 1 to the I2C-
nCTL.TXNACK bit before the I2CnINTF.RBFIF bit is set to 1.
The received data can be read out from the I2CnRXD register after a receive buffer full interrupt has oc-
curred. The I2C Ch.n pulls down SCL to low and enters standby state until data is read out from the I2C-
nRXD register.
This reading triggers the I2C Ch.n to start subsequent data reception.
Generating a STOP or repeated START condition
It is the same as the data transmission in master mode.
S1C17W03/W04 TECHNICAL MANUAL
(Rev. 1.2)
Seiko Epson Corporation
14 I 2 C (I2C)
14-7