Table of Contents
Advertisement
17 IR REMOTE CONTROLLER (REMC2)
REMC2 Data Bit Active Pulse Length Register
Register name
Bit
REMAPLEN
15–0 APLEN[15:0]
Bits 15–0 APLEN[15:0]
These bits set the active pulse length of the data signal (high period when the REMDBCTL.RE-
MOINV bit = 0 or low period when the REMDBCTL.REMOINV bit = 1).
The REMO pin output is set to the active level from the 16-bit counter for data signal genera-
tion = 0x0000 and it is inverted to the inactive level when the counter exceeds the REMAPLEN.
APLEN[15:0] bit-setting value. The data signal duty ratio is determined by this setting and the REM-
DBLEN.DBLEN[15:0] bit-setting. (See Figure 17.4.3.3.)
Before this register can be rewritten, the REMDBCTL.MODEN bit must be set to 1.
REMC2 Data Bit Length Register
Register name
Bit
REMDBLEN
15–0 DBLEN[15:0]
Bits 15–0 DBLEN[15:0]
These bits set the data length of the data signal (length of one cycle).
A data signal cycle begins with the 16-bit counter for data signal generation = 0x0000 and ends when
the counter exceeds the REMDBLEN.DBLEN[15:0] bit-setting value. (See Figure 17.4.3.3.)
Before this register can be rewritten, the REMDBCTL.MODEN bit must be set to 1.
REMC2 Status and Interrupt Flag Register
Register name
Bit
REMINTF
15–11 –
10
9
8
7–2 –
1
0
Bits 15–11 Reserved
Bit 10
DBCNTRUN
This bit indicates whether the 16-bit counter for data signal generation is running or not. (See Figure
17.4.4.1.)
1 (R):
Running (Counting)
0 (R):
Idle
Bit 9
DBLENBSY
This bit indicates whether the value written to the REMDBLEN.DBLEN[15:0] bits is transferred to
the REMDBLEN buffer or not. (See Figure 17.4.4.1.)
1 (R):
Transfer to the REMDBLEN buffer has not completed.
0 (R):
Transfer to the REMDBLEN buffer has completed.
While this bit is set to 1, writing to the REMDBLEN.DBLEN[15:0] bits is ineffective.
Bit 8
APLENBSY
This bit indicates whether the value written to the REMAPLEN.APLEN[15:0] bits is transferred to
the REMAPLEN buffer or not. (See Figure 17.4.4.1.)
1 (R):
Transfer to the REMAPLEN buffer has not completed.
0 (R):
Transfer to the REMAPLEN buffer has completed.
17-10
Bit name
Initial
0x0000
Bit name
Initial
0x0000
Bit name
Initial
0x00
DBCNTRUN
0
DBLENBSY
0
APLENBSY
0
0x00
DBIF
0
APIF
0
Seiko Epson Corporation
Reset
R/W
H0
R/W
Writing enabled when REMDBCTL.
MODEN bit = 1.
Reset
R/W
H0
R/W
Writing enabled when REMDBCTL.
MODEN bit = 1.
Reset
R/W
–
R
–
H0/S0
R
Cleared by writing 1 to the
REMDBCTL.REMCRST bit.
H0
R
Effective when the REMDBCTL.
BUFEN bit = 1.
H0
R
–
R
–
H0/S0
R/W
Cleared by writing 1 to this bit or the
REMDBCTL.REMCRST bit.
H0/S0
R/W
S1C17W03/W04 TECHNICAL MANUAL
Remarks
Remarks
Remarks
(Rev. 1.2)
Advertisement
Table of Contents
