APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
Address
Register name
0x42d2 PDIOEN
(Pd Port Enable
Register)
0x42d4 PDRCTL
(Pd Port Pull-up/down
Control Register)
0x42dc PDMODSEL
(Pd Port Mode Select
Register)
0x42de PDFNCSEL
(Pd Port Function
Select Register)
0x42e0 PCLK
(P Port Clock Control
Register)
0x42e2 PINTFGRP
(P Port Interrupt Flag
Group Register)
0x4300–0x431c
Address
Register name
0x4300 P0UPMUX0
(P00–01 Universal
Port Multiplexer
Setting Register)
0x4302 P0UPMUX1
(P02–03 Universal
Port Multiplexer
Setting Register)
AP-A-10
Bit
Bit name
15–13 –
12–11 PDIEN[4:3]
10
(reserved)
9–8 PDIEN[1:0]
7–5 –
4–0 PDOEN[4:0]
15–13 –
12–11 PDPDPU[4:3]
10
(reserved)
9–8 PDPDPU[1:0]
7–5 –
4–3 PDREN[4:3]
2
(reserved)
1–0 PDREN[1:0]
15–8 –
7–5 –
4–0 PDSEL[4:0]
15–10 –
9–8 PD4MUX[1:0]
7–6 PD3MUX[1:0]
5–4 PD2MUX[1:0]
3–2 PD1MUX[1:0]
1–0 PD0MUX[1:0]
15–9 –
8
DBRUN
7–4 CLKDIV[3:0]
3–2 KRSTCFG[1:0]
1–0 CLKSRC[1:0]
15–8 –
7–5 –
4
P4INT
3
P3INT
2
P2INT
1
P1INT
0
P0INT
Bit
Bit name
15–13 P01PPFNC[2:0]
12–11 P01PERICH[1:0]
10–8 P01PERISEL[2:0]
7–5 P00PPFNC[2:0]
4–3 P00PERICH[1:0]
2–0 P00PERISEL[2:0]
15–13 P03PPFNC[2:0]
12–11 P03PERICH[1:0]
10–8 P03PERISEL[2:0]
7–5 P02PPFNC[2:0]
4–3 P02PERICH[1:0]
2–0 P02PERISEL[2:0]
Seiko Epson Corporation
Initial
Reset
R/W
0x0
–
R
0x0
H0
R/W
0
H0
R/W
0x0
H0
R/W
0x0
–
R
0x00
H0
R/W
0x0
–
R
0x0
H0
R/W
0
H0
R/W
0x0
H0
R/W
0x0
–
R
0x0
H0
R/W
0
H0
R/W
0x0
H0
R/W
0x00
–
R
0x0
–
R
0x07
H0
R/W
0x00
–
R
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x00
–
R
0
H0
R/WP
0x0
H0
R/WP
0x0
H0
R/WP
0x0
H0
R/WP
0x00
–
R
0x0
–
R
0
H0
R
0
H0
R
0
H0
R
0
H0
R
0
H0
R
Universal Port Multiplexer (UPMUX)
Initial
Reset
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
0x0
H0
R/W
S1C17W03/W04 TECHNICAL MANUAL
Remarks
–
–
–
–
–
–
Remarks
–
–
(Rev. 1.2)